TI中文支持网弱弱的问一下，1394链路层芯片用TSB12LV32，如何在主机端收到125us循环开始的信号呢？
Nick Dai：
Kai,
The CYCLEIN input terminal is an optional external 8-kHz clock that can be used to set up the isochronous cycle clock.
guocheng liu：
前辈你好，我现在在做一个1394接口，用的也是TSB12LV32芯片，但是在配置寄存器进行读写时，总线是16位的，寄存器是32位的，就只能读出前16位的数值，即使改变给出的地址，寄存器的后面16位就没法读出，请问这个地址值该如何给出呢？希望你能帮帮我，为我解答一下这个问题，我将不胜感激，在此谢谢你了
guocheng liu：
回复 Nick Dai:
Nick Dai
Kai,
The CYCLEIN input terminal is an optional external 8-kHz clock that can be used to set up the isochronous cycle clock.
Nick Dai：
回复 guocheng liu:
Hi Guocheng,
数据手册总对handshake模式的描述中有说明，MCA将保持低如果MD线还有有效的读数据直到控制器接口释放了MCS。也就是要在MCA为低时连续的读取数据直到MCS变高。
2. Following the next rising edge of BCLK, the TSB12LV32 takes MCA low to signal that the requestedoperation is complete. This takes place after two BCLK cycles. MCA remains low with the MD linescontaining valid read data until the microcontroller interface releases MCS (high state)
guocheng liu：
回复 Nick Dai:
Nick Dai
Hi Guocheng,
数据手册总对handshake模式的描述中有说明，MCA将保持低如果MD线还有有效的读数据直到控制器接口释放了MCS。也就是要在MCA为低时连续的读取数据直到MCS变高。
2. Following the next rising edge of BCLK, the TSB12LV32 takes MCA low to signal that the requestedoperation is complete. This takes place after two BCLK cycles. MCA remains low with the MD linescontaining valid read data until the microcontroller interface releases MCS (high state)
