C6748 UART1 EDMA3 发送数据，串口助手收到的数据和字节数都不对。

用C6748 的UART1 EDMA3 发送数据 10个数据”123456789“串口只收到 0xFA,0x35,0x94   复位后收到是另外三个字符。

代码如下。

<

#include "types.h"
#include "psc.h"
#include "test_uart.h"
#include <stdio.h>
#include <string.h>
#include "interrupt.h"
#include "edma_event.h"
#include "edma.h" // 直接内存访问宏及设备抽象层函数声明
#include "edma_event.h" // 直接内存访问事件

#define DEBUG_PORT (1)//uart1
#define DEBUG_PORT_BaudRate (57600)//uart1

#define UART_RBR_THR_REG ((0x01D0C000u) + (0u))

#define MAX_ACNT 1
#define MAX_CCNT 1

#define RX_BUFFER_SIZE 20

/* EDMA3 Event queue number. */
#define EVT_QUEUE_NUM 0

volatile unsigned int flag = 0;

extern void RK6748_uartRxInt0(void);
extern void RK6748_uartRxInt1(void);
extern void RK6748_uartRxInt2(void);
void EDMA3Initialize(void);
static void ConfigureIntEDMA3(void);

static void UartTransmitData(unsigned int tccNum, unsigned int chNum,
volatile char *buffer, unsigned int buffLength);

/* Callback Function Declaration*/
static void (*cb_Fxn[EDMA3_NUM_TCC]) (unsigned int tcc, unsigned int status);

static void callback(unsigned int tccNum, unsigned int status);
static void ConfigureIntEDMA3(void);
static void Edma3ComplHandlerIsr(void);
static void Edma3CCErrHandlerIsr(void);
static void EDMA3Initialize(void);
static void SetupInt(void);

/****************************************************************************/
/* */
/* 设置中断 */
/* */
/****************************************************************************/
static void SetupInt(void)
{ // Initialize the DSP INTC
IntDSPINTCInit();
// Enable DSP interrupts globally
IntGlobalEnable();
}

/****************************************************************************/
/* */
/* 设置UART0中断 */
/* */
/****************************************************************************/
static void ConfigureIntUART0(void)
{
IntRegister(C674X_MASK_INT4, RK6748_uartRxInt0);
IntEventMap(C674X_MASK_INT4, SYS_INT_UART0_INT);
IntEnable(C674X_MASK_INT4);
}

/****************************************************************************/
/* */
/* 设置UART1中断 */
/* */
/****************************************************************************/
static void ConfigureIntUART1(void)
{
IntRegister(C674X_MASK_INT5, RK6748_uartRxInt1);
IntEventMap(C674X_MASK_INT5, SYS_INT_UART1_INT);
IntEnable(C674X_MASK_INT5);
}

/****************************************************************************/
/* */
/* 设置UART2中断 */
/* */
/****************************************************************************/
static void ConfigureIntUART2(void)
{
IntRegister(C674X_MASK_INT6, RK6748_uartRxInt2);
IntEventMap(C674X_MASK_INT6, SYS_INT_UART2_INT);
IntEnable(C674X_MASK_INT6);
}

//调试串口uart1初始化
void DebugUartInit(void)
{ volatile char enter[] = "123456789";
unsigned int buffLength = 0;

RK6748_uartInit(DEBUG_PORT,DEBUG_PORT_BaudRate);
RK6748_uartIntEnable(DEBUG_PORT);
SetupInt();
ConfigureIntUART1();

EDMA3Initialize();

/* Request DMA Channel and TCC for UART Transmit*/
EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,
EDMA3_CHA_UART1_TX, EDMA3_CHA_UART1_TX,
EVT_QUEUE_NUM);

/* Registering Callback Function for TX*/
cb_Fxn[EDMA3_CHA_UART1_TX] = &callback;

/* Used for bCnt */
buffLength = strlen((const char *) enter);

/* Transmit Data for Enter Message */
UartTransmitData(EDMA3_CHA_UART1_TX, EDMA3_CHA_UART1_TX,
enter, buffLength);
while(0 == flag);
flag = 0;
/* Free EDMA3 Channels for TX and RX */
EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,
EDMA3_CHA_UART1_TX, EDMA3_TRIG_MODE_EVENT,
EDMA3_CHA_UART1_TX, EVT_QUEUE_NUM);
}

void DebugPrintf(UINT8 *pData)
{
RK6748_uartSend(DEBUG_PORT,pData);
printf(pData);
}

//串口uart2初始化
void Uart2Init(void)
{ RK6748_uartInit(2,57600);
RK6748_uartIntEnable(2);
SetupInt();
ConfigureIntUART2();
}

/* Function used to Initialize EDMA3 */
void EDMA3Initialize(void)
{
// /* Enabling the PSC for EDMA3CC_0.*/
PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_CC0, PSC_POWERDOMAIN_ALWAYS_ON,
PSC_MDCTL_NEXT_ENABLE);
//
// /* Enabling the PSC for EDMA3TC_0.*/
PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_TC0, PSC_POWERDOMAIN_ALWAYS_ON,
PSC_MDCTL_NEXT_ENABLE);

/* Initialization of EDMA3 */
EDMA3Init(SOC_EDMA30CC_0_REGS, EVT_QUEUE_NUM);

/*
** Enable AINTC to handle interuppts. Also enable IRQ interuppt in
** ARM processor.
*/
SetupInt();

/* Register EDMA3 Interrupts */
ConfigureIntEDMA3();
}

/* EDMA3 Completion Handler */
static void edma3ComplHandler(unsigned int baseAdd, unsigned int regionNum)
{
volatile unsigned int pendingIrqs;
volatile unsigned int isIPR = 0;

unsigned int indexl;
unsigned int Cnt = 0;
indexl = 1;

#ifdef _TMS320C6X
IntEventClear(SYS_INT_EDMA3_0_CC0_INT1);
#else
IntSystemStatusClear(SYS_INT_CCINT0);
#endif
isIPR = HWREG(baseAdd + EDMA3CC_S_IPR(regionNum));
if(isIPR)
{
while ((Cnt < EDMA3CC_COMPL_HANDLER_RETRY_COUNT)&& (indexl != 0u))
{
indexl = 0u;
pendingIrqs = HWREG(baseAdd + EDMA3CC_S_IPR(regionNum));
while (pendingIrqs)
{
if((pendingIrqs & 1u) == 1)
{
/**
* If the user has not given any callback function
* while requesting the TCC, its TCC specific bit
* in the IPR register will NOT be cleared.
*/
/* here write to ICR to clear the corresponding IPR bits */
HWREG(baseAdd + EDMA3CC_S_ICR(regionNum)) = (1u << indexl);

(*cb_Fxn[indexl])(indexl, EDMA3_XFER_COMPLETE);
}
++indexl;
pendingIrqs >>= 1u;
}
Cnt++;
}
}
}

/* EDMA3 Error Handler */
static void edma3CCErrHandler(unsigned int baseAdd)
{
volatile unsigned int pendingIrqs = 0;
unsigned int regionNum = 0;
unsigned int evtqueNum = 0;
unsigned int index = 1;
unsigned int Cnt = 0;

#ifdef _TMS320C6X
IntEventClear(SYS_INT_EDMA3_0_CC0_ERRINT);
#else
IntSystemStatusClear(SYS_INT_CCERRINT);
#endif

if((HWREG(baseAdd + EDMA3CC_EMR) != 0 ) || \
(HWREG(baseAdd + EDMA3CC_QEMR) != 0) || \
(HWREG(baseAdd + EDMA3CC_CCERR) != 0))
{
/* Loop for EDMA3CC_ERR_HANDLER_RETRY_COUNT number of time, breaks
when no pending interrupt is found */
while ((Cnt < EDMA3CC_ERR_HANDLER_RETRY_COUNT) && (index != 0u))
{
index = 0u;
pendingIrqs = HWREG(baseAdd + EDMA3CC_EMR);
while (pendingIrqs)
{
/*Process all the pending interrupts*/
if((pendingIrqs & 1u)==1)
{
/* Write to EMCR to clear the corresponding EMR bits.*/
HWREG(baseAdd + EDMA3CC_EMCR) = (1u<<index);
/*Clear any SER*/
HWREG(baseAdd + EDMA3CC_S_SECR(regionNum)) = (1u<<index);
}
++index;
pendingIrqs >>= 1u;
}
index = 0u;
pendingIrqs = HWREG(baseAdd + EDMA3CC_QEMR);
while (pendingIrqs)
{
/*Process all the pending interrupts*/
if((pendingIrqs & 1u)==1)
{
/* Here write to QEMCR to clear the corresponding QEMR bits*/
HWREG(baseAdd + EDMA3CC_QEMCR) = (1u<<index);
/*Clear any QSER*/
HWREG(baseAdd + EDMA3CC_S_QSECR(0)) = (1u<<index);
}
++index;
pendingIrqs >>= 1u;
}
index = 0u;
pendingIrqs = HWREG(baseAdd + EDMA3CC_CCERR);
if (pendingIrqs != 0u)
{
/* Process all the pending CC error interrupts. */
/* Queue threshold error for different event queues.*/
for (evtqueNum = 0u; evtqueNum < EDMA3_0_NUM_EVTQUE; evtqueNum++)
{
if((pendingIrqs & (1u << evtqueNum)) != 0u)
{
/* Clear the error interrupt. */
HWREG(baseAdd + EDMA3CC_CCERRCLR) = (1u << evtqueNum);
}
}

/* Transfer completion code error. */
if ((pendingIrqs & (1 << EDMA3CC_CCERR_TCCERR_SHIFT)) != 0u)
{
HWREG(baseAdd + EDMA3CC_CCERRCLR) = \
(0x01u << EDMA3CC_CCERR_TCCERR_SHIFT);
}
++index;
}
Cnt++;
}
}
}
static void Edma3CCErrHandlerIsr()
{
/* Invoke CC Error Handler ISR */
edma3CCErrHandler(SOC_EDMA30CC_0_REGS);
}
static void Edma3ComplHandlerIsr(void)
{
#ifdef _TMS320C6X
// Invoke Completion Handler ISR
edma3ComplHandler(SOC_EDMA30CC_0_REGS, 1);
#else
/* Invoke Completion Handler ISR */
edma3ComplHandler(SOC_EDMA30CC_0_REGS, 0);
#endif
}
/* Function to register EDMA3 Interuppts */
static void ConfigureIntEDMA3(void)
{
IntRegister(C674X_MASK_INT4, Edma3ComplHandlerIsr);
IntRegister(C674X_MASK_INT5, Edma3CCErrHandlerIsr);

IntEventMap(C674X_MASK_INT4, SYS_INT_EDMA3_0_CC0_INT1);
IntEventMap(C674X_MASK_INT5, SYS_INT_EDMA3_0_CC0_ERRINT);

IntEnable(C674X_MASK_INT4);
IntEnable(C674X_MASK_INT5);
}
static void UartTransmitData(unsigned int tccNum, unsigned int chNum,
volatile char *buffer, unsigned int buffLength)
{
EDMA3CCPaRAMEntry paramSet;

/* Fill the PaRAM Set with transfer specific information */
paramSet.srcAddr = (unsigned int) buffer;
paramSet.destAddr = UART_RBR_THR_REG;
paramSet.aCnt = buffLength;
paramSet.bCnt = 1;
paramSet.cCnt = 1;

/* The src index should increment for every byte being transferred. */
paramSet.srcBIdx = (short) 0u;

/* The dst index should not be increment since it is a h/w register*/
paramSet.destBIdx = (short) 0u;

/* A sync Transfer Mode */
paramSet.srcCIdx = (short) 0u;
paramSet.destCIdx = (short) 0u;
paramSet.linkAddr = (unsigned short)0xFFFFu;
paramSet.bCntReload = (unsigned short)0u;
paramSet.opt = 0x00000000u;
paramSet.opt |= (EDMA3CC_OPT_DAM ); //目的地址模式不加1
// paramSet.opt |= (EDMA3CC_OPT_FWID_256BIT << EDMA3CC_OPT_FWID_SHIFT);
paramSet.opt |= ((tccNum << EDMA3CC_OPT_TCC_SHIFT) & EDMA3CC_OPT_TCC);
paramSet.opt |= (1 << EDMA3CC_OPT_TCINTEN_SHIFT);

/* Now write the PaRAM Set */
EDMA3SetPaRAM(SOC_EDMA30CC_0_REGS, chNum, &paramSet);

/* Enable EDMA Transfer */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, chNum, EDMA3_TRIG_MODE_MANUAL);
}

/*
** This function is used as a callback from EDMA3 Completion Handler.
** UART in DMA Mode is Disabled over here.
*/
static void callback(unsigned int tccNum, unsigned int status)
{
//UARTDMADisable(SOC_UART_1_REGS, (UART_RX_TRIG_LEVEL_1 | UART_FIFO_MODE));
flag = 1;
}

>

Shine：

请参考starterware里的uart_edma例程http://www.ti.com.cn/tool/cn/STARTERWARE-C6DSP

例程的说明见下面的wiki网站。http://processors.wiki.ti.com/index.php/StarterWare_01.20.01.01_User_Guide#Example_Application_.28EDMA.29