6678 srio

两个dsp通信的例程SRIO_2DSP_Test.c 中 

{SRIO_PKT_TYPE9_STREAM, CORE0_LL2_HOST_SIZE1_FDQ, DSP1_SRIO_BASE_ID+SRIO_RX_FLOW_CORE1_LL2, 4096}, /*port2*/

这一行配置的什么，谢谢

/*Please note, dual Nyquist EVM only connects port 2 and 3 between 2 DSPs.*/
SRIO_Multiple_Test_Config test_2DSP_cfg=
{
SRIO_PATH_CTL_4xLaneABCD, /*multiple_port_path*/ 
/*packet_type source dest size*/
{{0, 0, 0, 0}, /*port0 is not availible for this case*/
{0, 0, 0, 0}, /*port1 is not availible for this case*/

{SRIO_PKT_TYPE9_STREAM, CORE0_LL2_HOST_SIZE1_FDQ, DSP1_SRIO_BASE_ID+SRIO_RX_FLOW_CORE1_LL2, 4096}, /*port2*/

{SRIO_PKT_TYPE_SWRITE, ((Uint32)&packetBuffer_LL2_Size1[0][0])+0x10000000, ((Uint32)&packetBuffer_LL2_Size1[1][0])+0x10000000, LL2_PACKET_BUFFER_SIZE1}} /*port3*/
};

Nancy Wang：

请阅读附件的手册。

3757.SRIO_Programming_Performance.pdf