C6657的IPC中断无法进入ISR

最近在调试C6657的核间通信，采用IPC中断方式，核0给核1发送IPC中断，但是程序没有进入ISR中，不知道问题出在哪里，希望大神给些指导

下面是我的程序

Shine：

程序显示不出来，需要插入不能复制粘贴。

另外，请检查一下IFR标志位是否置1？ IER, GIE使能位是否使能？

user4240389：

回复 Shine:

/** main.c*/
#include <c6x.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>#include <ti/csl/csl_chip.h>
#include <ti/csl/src/intc/csl_intc.h>
#include <ti/csl/csl_cpintcAux.h>int main(void)
{uint32_t i;uint32_t coreID = CSL_chipReadReg (CSL_CHIP_DNUM);TSCL = 0;intcInit();//init the intc CSL global data structures, enable global ISRregisterInterrupt(); //register the Host interrupt with the eventfor (i=0; i<1000; i++)asm (" NOP 5");if (0 == coreID){IssueInterruptToNextCore();}while(1){asm(" NOP 9");};
}
CSL_IntcGlobalEnableState state;
CSL_IntcContext context;
CSL_IntcEventHandlerRecord Record[CSL_INTC_EVENTID_CNT];
CSL_IntcEventHandlerRecordEventRecord;
uint32_tcoreVector[MAX_CORE_NUM];
CSL_IntcObjintcObj[16];
CSL_IntcHandlehintc[16];
volatile Uint32 interruptNumber=0;/* IPCGR Info */
int32_t iIPCGRInfo[CORENUM] = {IPCGR0,IPCGR1};
/* IPCAR Info */
int32_t iIPCARInfo[CORENUM] = {IPCAR0,IPCAR1};interruptCfg intInfo[MAX_SYSTEM_VECTOR] =
{/* coreeventvector*/{0,90,CSL_INTC_VECTID_4, &IPC_ISR},{1,90,CSL_INTC_VECTID_4, &IPC_ISR},
};/***@b Description*@n*The functions initializes the INTC module.**@retval*Success -0*@retval*Error-<0*/
int32_t intcInit()
{/* INTC module initialization */context.eventhandlerRecord = Record;context.numEvtEntries= CSL_INTC_EVENTID_CNT;if (CSL_intcInit (&context) != CSL_SOK)return -1;/* Enable NMIs */if (CSL_intcGlobalNmiEnable () != CSL_SOK)return -1;/* Enable global interrupts */if (CSL_intcGlobalEnable (&state) != CSL_SOK)return -1;/* INTC has been initialized successfully. */return 0;
}/*@b Description*@n**Function registers the high priority interrupt.*@retval*Success -0*@retval*Error-<0*/int32_t registerInterrupt()
{uint32_t i;uint32_t event;uint32_t vector;uint32_t core;uint32_t coreID = CSL_chipReadReg (CSL_CHIP_DNUM);CSL_IntcEventHandler isr;for (i=0; i<MAX_CORE_NUM; i++){coreVector[i] = 0;}for (i=0; i<MAX_SYSTEM_VECTOR; i++){core= intInfo[i].core;if (coreID == core){event= intInfo[i].event;vector = intInfo[i].vect;isr= intInfo[i].isr;if (MAX_CORE_VECTOR <= coreVector[core]){printf("Core %d Vector Number Exceed\n");}hintc[vector] = CSL_intcOpen (&intcObj[vector], event, (CSL_IntcParam*)&vector , NULL);if (hintc[vector] == NULL){printf("Error: GEM-INTC Open failed\n");return -1;}/* Register an call-back handler which is invoked when the event occurs. */EventRecord.handler = isr;EventRecord.arg = 0;if (CSL_intcPlugEventHandler(hintc[vector],&EventRecord) != CSL_SOK){printf("Error: GEM-INTC Plug event handler failed\n");return -1;}/* clear the events. */if (CSL_intcHwControl(hintc[vector],CSL_INTC_CMD_EVTCLEAR, NULL) != CSL_SOK){printf("Error: GEM-INTC CSL_INTC_CMD_EVTCLEAR command failed\n");return -1;}/* Enabling the events. */if (CSL_intcHwControl(hintc[vector],CSL_INTC_CMD_EVTENABLE, NULL) != CSL_SOK){printf("Error: GEM-INTC CSL_INTC_CMD_EVTENABLE command failed\n");return -1;}coreVector[core]++;}}return 0;
}
// BOOT and CONFIG dsp system modules Definitions
#define CHIP_LEVEL_REG0x02620000
// Boot cfg registers
#define KICK0*(unsigned int*)(CHIP_LEVEL_REG + 0x0038)
#define KICK1*(unsigned int*)(CHIP_LEVEL_REG + 0x003C)
#define KICK0_UNLOCK (0x83E70B13)
#define KICK1_UNLOCK (0x95A4F1E0)
#define KICK_LOCK0void IssueInterruptToNextCore()
{uint32_t CoreNum;uint32_t iNextCore;static uint32_t interruptInfo=0;CoreNum = CSL_chipReadReg (CSL_CHIP_DNUM);iNextCore = (CoreNum + 1)%2; //printf("Set interrupt from Core %x to Core %d, cycle = %d\n", CoreNum, iNextCore, TSCL);interruptInfo +=16;// Unlock ConfigKICK0 = KICK0_UNLOCK;KICK1 = KICK1_UNLOCK;*(volatile uint32_t *) iIPCGRInfo[iNextCore] = interruptInfo;*(volatile uint32_t *) iIPCGRInfo[iNextCore] |= 1;// Unlock ConfigKICK0 = KICK0_UNLOCK;KICK1 = KICK1_UNLOCK;printf("Interrupt Info %d\n", interruptInfo);
}/***@b Description*@n*IPC interrupt service routine***@retval*Setup corresponding flags based on SRC of IPCGR*/
void IPC_ISR()
{volatile uint32_t read_ipcgr;uint32_t CoreNum;uint32_t iPrevCore;CoreNum = CSL_chipReadReg (CSL_CHIP_DNUM);;iPrevCore = (CoreNum - 1)%2;read_ipcgr = *(volatile Uint32 *) iIPCGRInfo[CoreNum];*(volatile uint32_t *) iIPCARInfo[CoreNum] = read_ipcgr; //clear the related source infoprintf("Receive interrupt from Core %d with info 0x%x, cycle = %d\n", iPrevCore, read_ipcgr, TSCL);interruptNumber++;if(CoreNum!=0)//{IssueInterruptToNextCore();}else{printf("IPC test passed!\n");}
}
您好，上面是我的代码，我查看了IER、GIE位都使能了，但是IFR标志位相应的位没有置1，不知道是什么情况，麻烦您给些指导与建议，多谢啦~~

skysteed：

回复 user4240389:

void IPC_ISR() 前应该加关键字interrupt