LCDKOMAPL138开发板烧写DSP端程序到外部NANDflash-TI中文支持网

我使用TI的LCDKOMAPL138，CCS5.4，XDS100V2仿真器进行开发。编写了dsp端得程序。现在想把dsp端程序烧入到外部的NANDflash上，以使得开发板能够上电自运行。

我参考了下面的帖子：

http://processors.wiki.ti.com/index.php/Boot_Images_for_OMAP-L138#Booting_ARM_Binaries

在ccs中重新导入了arm端程序：

#include <cslr.h>
#include <cslr_syscfg0_OMAPL138.h>
#include <soc_OMAPL138.h>
#define SYS_BASE 0x01C14000
#define KICK0Ra *(unsigned int*)(SYS_BASE + 0x038)
#define KICK1Ra *(unsigned int*)(SYS_BASE + 0x03c)

CSL_SyscfgRegsOvly SYS_REGS = (CSL_SyscfgRegsOvly)CSL_SYSCFG_0_REGS;
CSL_PscRegsOvly psc0Regs = (CSL_PscRegsOvly) CSL_PSC_0_REGS;

int main (void)
{

// Open Permissions to SYSCFG Registers (Not required for PG2.0 silicon and above)
KICK0Ra = 0x83e70b13;
KICK1Ra = 0x95A4F1E0;

/* Set DSP boot address vector to entry point of DSP program
This must be aligned to 1KB boundaries */
SYS_REGS->HOST1CFG = 0x80010000;

/* Wake up the DSP */
CSL_FINST(psc0Regs->MDCTL[CSL_PSC_DSP], PSC_MDCTL_NEXT, ENABLE);
CSL_FINST(psc0Regs->PTCMD, PSC_PTCMD_GO1, SET);
while(CSL_FEXT(psc0Regs->PTSTAT, PSC_PTSTAT_GOSTAT1)==CSL_PSC_PTSTAT_GOSTAT1_IN_TRANSITION);
CSL_FINST(psc0Regs->MDCTL[CSL_PSC_DSP], PSC_MDCTL_LRST, DEASSERT);

while(1);
}

修改了arm的cmd文件：

MEMORY
{

SHDSPL2ROM o = 0x11700000 l = 0x00100000 /* 1MB L2 Shared Internal ROM */ SHDSPL2RAM o = 0x11800000 l = 0x00040000 /* 256kB L2 Shared Internal RAM */ SHDSPL1PRAM o = 0x11E00000 l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */
SHDSPL1DRAM o = 0x11F00000 l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */ EMIFACS0 o = 0x40000000 l = 0x20000000 /* 512MB SDRAM Data (CS0) */
EMIFACS2 o = 0x60000000 l = 0x02000000 /* 32MB Async Data (CS2) */
EMIFACS3 o = 0x62000000 l = 0x02000000 /* 32MB Async Data (CS3) */
EMIFACS4 o = 0x64000000 l = 0x02000000 /* 32MB Async Data (CS4) */
EMIFACS5 o = 0x66000000 l = 0x02000000 /* 32MB Async Data (CS5) */
SHRAM o = 0x8001b000 l = 0x00005000 /* 128kB Shared RAM */ DDR2 o = 0xC0000000 l = 0x20000000 /* 512MB DDR2 Data */

ARMROM o = 0xFFFD0000 l = 0x00010000 /* 64kB ARM local ROM */
ARMRAM o = 0xFFFF0000 l = 0x00002000 /* 8kB ARM local RAM */

}

SECTIONS
{
.text > SHRAM
.stack > SHRAM
.bss > SHRAM
.cio > SHRAM
.const > SHRAM
.data > SHRAM
.switch > SHRAM
.sysmem > SHRAM
.far > SHRAM
.args > SHRAM
.ppinfo > SHRAM
.ppdata > SHRAM
.svcstack > SHRAM /* Supervisor Mode Stack */
.irqstack > SHRAM /* IRQ Interrupt Stack */
.fiqstack > SHRAM /* FIQ Interrupt Stack */
.intvecs > ARMRAM /* Interrupt Vectors */
/* TI-ABI or COFF sections */
.pinit > SHRAM
.cinit > SHRAM
/* EABI sections */
.binit > SHRAM
.init_array > SHRAM
.neardata > SHRAM
.fardata > SHRAM
.rodata > SHRAM
.c6xabi.exidx > SHRAM
.c6xabi.extab > SHRAM
}
dsp端程序，修改了cmd文件：

MEMORY
{
#ifdef DSP_CORE /* DSP exclusive memory regions */

DSPL2ROM o = 0x00700000 l = 0x00100000 /* 1MB L2 DSP local ROM */
DSPL2RAM o = 0x00800000 l = 0x00040000 /* 256kB L2 DSP local RAM */
DSPL1PRAM o = 0x00E00000 l = 0x00008000 /* 32kB L1 DSP local Program RAM */
DSPL1DRAM o = 0x00F00000 l = 0x00008000 /* 32kB L1 DSP local Data RAM */

#endif

SHDSPL2ROM o = 0x11700000 l = 0x00100000 /* 1MB L2 Shared Internal ROM */
SHDSPL2RAM o = 0x11800000 l = 0x00040000 /* 256kB L2 Shared Internal RAM */
SHDSPL1PRAM o = 0x11E00000 l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */
SHDSPL1DRAM o = 0x11F00000 l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */
EMIFACS0 o = 0x40000000 l = 0x20000000 /* 512MB SDRAM Data (CS0) */
EMIFACS2 o = 0x60000000 l = 0x02000000 /* 32MB Async Data (CS2) */
EMIFACS3 o = 0x62000000 l = 0x02000000 /* 32MB Async Data (CS3) */
EMIFACS4 o = 0x64000000 l = 0x02000000 /* 32MB Async Data (CS4) */
EMIFACS5 o = 0x66000000 l = 0x02000000 /* 32MB Async Data (CS5) */
entry_point o = 0x80010000 l = 0x00000080 SHRAM o = 0x80010080 l = 0x0000af00 /* 128kB Shared RAM */
DDR2 o = 0xC0000000 l = 0x20000000 /* 512MB DDR2 Data */

#ifndef DSP_CORE /* ARM exclusive memory regions */

ARMROM o = 0xFFFD0000 l = 0x00010000 /* 64kB ARM local ROM */
ARMRAM o = 0xFFFF0000 l = 0x00002000 /* 8kB ARM local RAM */

#endif
}

SECTIONS
{
.text:_c_int00 > entry_point
.text > SHRAM
.stack > SHRAM
.bss > SHRAM
.cio > SHRAM
.const > SHRAM
.data > SHRAM
.switch > SHRAM
.sysmem > SHRAM
.far > SHRAM
.args > SHRAM
.ppinfo > SHRAM
.ppdata > SHRAM

/* TI-ABI or COFF sections */
.pinit > SHRAM
.cinit > SHRAM

/* EABI sections */
.binit > SHRAM
.init_array > SHRAM
.neardata > SHRAM
.fardata > SHRAM
.rodata > SHRAM
.c6xabi.exidx > SHRAM
.c6xabi.extab > SHRAM
}

重新编译无误后生产.out文件。利用AISgen for D800K008工具生产bin文件：

然后利用OMAP-L138_FlashAndBootUtils_2_40工具包里面的slh_OMAP-L138将bin文件烧入NANDflash，更改boot为从UART启动：

1，擦出flash

2,烧写程序

从烧写命令上看，好像烧入的地址不对，全部完成后，我设置boot模式为从NANDflash启动，上电程序不能运行。

不知道这样的理解和操作步骤是否正确？希望能得到技术人员的指导，十分感谢！

Denny%20Yang99373：

这个问题步骤比较多，可能出错点也比较多，建议分步实验。

1，先做个ARM的程序烧到NAND里启动。分为以下几个步骤：a,用CCS JTAG下载程序看看能否通过。b,程序烧到nand，上电启动后通过ccs链接芯片，检查内存，看程序有无复制到内存。

2，然后加入DSP的支持。

renjie wang：

回复 Denny%20Yang99373:

谢谢您的回复！

我可以理解为上面帖子我的操作思路是对的是吗？

按照您的建议，我单独测试了arm端程序。

CCS JTAG下载程序，仿真，程序运行中没有改变寄存器的值。于是，我又把.out文件按照如图所示设置：

生成bin格式文件，首先我想通过TI 工具包的UARTHost下载，发现出现如下问题：

于是，我又尝试通过 sfh_OMAP-L138.exe工具烧写：

显示烧写成功。

然后我上电启动，用CCS JTAG连接芯片，通过ccs查看，操作的寄存器还是没有变化。

查看内存：

不知道程序是不是已经加载进来了。我已经将arm端工程附在后面，希望您有时间能帮我看看！谢谢！