CC3200在用Pinmux配置引脚时,想将暂时不用的GPIO口配置为Low Power Deep Sleep模式,请问GPIO引脚的配置该如何设置?或者请问有没有参考例程呢?
user5170770:
回复 Susan Yang:
好的,感谢
Susan Yang:
回复 user5170770:
很高兴能帮到您!
Terry Han:
参考如下代码
//****************************************************************************////! Enter the HIBernate mode configuring the wakeup timer//!//! \param none//! //! This function //! 1. Sets up the wakeup RTC timer//! 2. Enables the RTC//! 3. Enters into HIBernate //!//! \return None.////****************************************************************************void EnterHIBernate(){ #define SLOW_CLK_FREQ (32*1024)//// Configure the HIB module RTC wake time//MAP_PRCMHibernateIntervalSet(5 * SLOW_CLK_FREQ);
//// Enable the HIB RTC//// MAP_PRCMHibernateWakeupSourceEnable(PRCM_HIB_SLOW_CLK_CTR);//————————————————————Hib模式下增加GPIO唤醒————————————————————— // PRCMHibernateWakeupSourceEnable入口参数 // PRCM_HIB_SLOW_CLK_CTR -PRCM_HIB_GPIO2 -PRCM_HIB_GPIO4 -PRCM_HIB_GPIO13 -PRCM_HIB_GPIO17 -PRCM_HIB_GPIO11 -PRCM_HIB_GPIO24 -PRCM_HIB_GPIO26 PRCMHibernateWakeupSourceEnable(PRCM_HIB_GPIO13);PRCMHibernateWakeUpGPIOSelect(PRCM_HIB_GPIO13,PRCM_HIB_FALL_EDGE); //按键按下去产生上升沿,松开后产生下降沿!注意入口参数的顺序!!!//————————————————————————————————————————————————
// DBG_PRINT("HIB: Entering HIBernate…\n\r");UART_PRINT("Entering HIB\n\r"); MAP_UtilsDelay(80000);//// powering down SPI Flash to save power //Utils_SpiFlashDeepPowerDown();//// Enter HIBernate mode//MAP_PRCMHibernateEnter();}
// set_rtc_as_wk_src(WK_LPDS, LPDS_DUR_SEC, false); //测试LPDS功耗,不使用定时器唤醒,仅使用GPIO唤醒!// set_gpio_as_wk_src(WK_LPDS, GPIO_SRC_WKUP, PRCM_LPDS_FALL_EDGE);//——————————————————————注意!!——————————————————————————————— // set_gpio_as_wk_src(WK_HIB, GPIO_SRC_WKUP, PRCM_LPDS_FALL_EDGE); //必须设置进入Hib模式下的中断唤醒源,否则无法进入Hib模式//注意在sl_Stop(10)之前不要启动该语句,否则NWP在sl_Stop(10)之后就自动进入了Hib模式但是唤醒源并没设置OK,直接屏蔽该语句,用EnterHIBernate();即可
// 对应低功耗模式:// e_pm_S0, // CPU & HW modules are functioning at optimal & intended freq Active模式// e_pm_S1, // CPU is halted, high freq PLL CLK is available to HW modules Sleep模式// e_pm_S2, // CPUSS is clk gated, Mid freq CLK is availalbe to HW modules DPS模式// e_pm_S3, // SoC almost pwr off, slow CLK is present & OCRAM is retained LPDS模式// e_pm_S4 // SOC almost pwr off, slow CLK is present & few regs retained hib模式