TI中文支持网尊敬的TI工程师们，我是一名苏大的学生。
【问题背景】PGA450-Q1芯片内部有8051核单片机可以控制超声波外设，但是我想用外部CPU控制芯片的超声波外设。
【我所知道的】我看了数据手册《PGA450-Q1 Ultrasonic-Sensor Signal Conditioner》Rev.C,
手册的7.4.3节提到，用SPI发送命令，可以使8051核不起作用,但是芯片内超声波外设仍可以工作。要使8051不起作用，需要用SPI写1到MICRO RESET寄存器的第0位。MICRO RESET寄存器是属于test寄存器的，但是我没有在test寄存器中找到MICRO RESET寄存器的地址。
“The PGA450-Q1 can also be put into a RESET state where the microcontroller is not active. During this state,
SPI is the only digital interface that can be used. The low-side drivers can still be triggered to begin an ultrasonic
burst and the analog front-end and digital data path can still store the returned echo signal in the FIFO RAM.
However, any processing of the FIFO RAM by the internal microprocessor to determine the location of an object
does not occur. The FIFO RAM data can be read over SPI, allowing an external microprocessor to process the
data.
While the microcontroller is active, the MICRO RESET test register is the only register accessible through SPI.
The device must be put into the RESET state before sending additional SPI commands.
The maximum current (VREG not charging) in the RESET state is 15 mA.
To put the microcontroller in reset, write a 1 to bit 0 of the MICRO RESET test register.
To bring the microcontroller out of reset, write a 0 to bit 0 of the MICRO RESET test register.”
【问题是】
MICRO RESET寄存器的地址是多少？为什么我在test寄存器找不到这个寄存器？
用SPI使内部8051核复位的完整命令是？
Susan Yang：
建议将问题发至
接口/时钟
chaohua zou：
中文版的datasheet很多重要信息都没,建议看英文版
7.4.3 RESETThe PGA450-Q1 can also be put into a RESET state where the microcontroller is not active. During this state,SPI is the only digital interface that can be used. The low-side drivers can still be triggered to begin an ultrasonicburst and the analog front-end and digital data path can still store the returned echo signal in the FIFO RAM.However, any processing of the FIFO RAM by the internal microprocessor to determine the location of an objectdoes not occur. The FIFO RAM data can be read over SPI, allowing an external microprocessor to process thedata.While the microcontroller is active, the MICRO RESET test register is the only register accessible through SPI.The device must be put into the RESET state before sending additional SPI commands.The maximum current (VREG not charging) in the RESET state is 15 mA.To put the microcontroller in reset, write a 1 to bit 0 of the MICRO RESET (address 0x2F) test register. Transmitthe TEST Write SPI command in the following order: 0x16, 0x2F, 0x01.To bring the microcontroller out of reset, write a 0 to bit 0 of the MICRO RESET (address 0x2F) test register.Transmit the TEST Write SPI command in the following order: 0x16, 0x2F, 0x00.NOTEThe MICRO RESET (0x2F) register is an internal test register, which is why the field is notlisted in the SFR or ESFR register map.
