TI中文支持网都用的是LaunchPad开发板
一个主机一个从机。主机例程是官方的msp430g2xx3_usciB0_i2c_04,从机是msp430g2xx3_usciB0_i2c_05。
现在的问题是主机死在while (UCB0CTL1 & UCTXSTT); // Start condition sent?
从机死在这一句 __bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts的前面。
电路按照例程要求做好了，两个上拉电阻1K（没有10K的电阻）。
软件用的是CCS_V5.1。
示波器上SCL,SDA有信号，但不是时钟信号。
请问为什么？
Bill Kent：
电路按照例程要求做好了，两个共地，下拉电阻100K（没有10K的电阻）。
Young Hu：
您好！
建议做如下检查：
1、检查硬件的连线；
2、用示波器抓一下图，看看数据线和时钟线上有没有信号。
然后把结果发上来，大家帮您看看。
Bill Kent：
回复 Bill Kent:
我现在是两台电脑（win7，32位）同时分别控制两个板，软件都用的是CCS_V5.1
Bill Kent：
回复 Young Hu:
一直是低，没有信号。请问一下，是应该接上拉，还是下拉电阻。
Hardy Hu：
这里有个例程可以试试，再结合自己的代码看看：
//******************************************************************************
// MSP430G2xx3 Demo – USCI_B0 I2C Master RX single bytes from MSP430 Slave
//
// Description: This demo connects two MSP430's via the I2C bus. The master
// reads from the slave. This is the master code. The data from the slave
// transmitter begins at 0 and increments with each transfer. The received
// data is in R5 and is checked for validity. If the received data is
// incorrect, the CPU is trapped and the P1.0 LED will stay on. The USCI_B0
// RX interrupt is used to know when new data has been received.
// ACLK = n/a, MCLK = SMCLK = BRCLK = default DCO = ~1.2MHz
//
// /|\ /|\
// MSP430G2xx3 10k 10k MSP430G2xx3
// slave | | master
// —————– | | —————–
// -|XIN P1.7/UCB0SDA|<-|—+->|P1.7/UCB0SDA XIN|-
// | | | | | 32kHz
// -|XOUT | | | XOUT|-
// | P1.6/UCB0SCL|<-+—–>|P1.6/UCB0SCL |
// | | | P1.0|–> LED
//
// D. Dang
// Texas Instruments Inc.
// February 2011
// Built with CCS Version 4.2.0 and IAR Embedded Workbench Version: 5.10
//******************************************************************************
#include "msp430g2553.h"
unsigned char RXData;
unsigned char RXCompare;
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1OUT &= ~BIT0; // P1.0 = 0
P1DIR |= BIT0; // P1.0 output
P1SEL |= BIT6 + BIT7; // Assign I2C pins to USCI_B0
P1SEL2|= BIT6 + BIT7; // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC; // I2C Master, synchronous mode
UCB0CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK, keep SW reset
UCB0BR0 = 12; // fSCL = SMCLK/12 = ~100kHz
UCB0BR1 = 0;
UCB0I2CSA = 0x048; // Slave Address is 048h
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
IE2 |= UCB0RXIE; // Enable RX interrupt
RXCompare = 0; // Used to check incoming data
while (1)
{
while (UCB0CTL1 & UCTXSTP); // Ensure stop condition got sent
UCB0CTL1 |= UCTXSTT; // I2C start condition
while (UCB0CTL1 & UCTXSTT); // Start condition sent?
UCB0CTL1 |= UCTXSTP; // I2C stop condition
__bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts
if (RXData != RXCompare) // Trap CPU if wrong
{
P1OUT |= BIT0; // P1.0 = 1
while (1); // Trap CPU
}
RXCompare++; // Increment correct RX value
}
}
// USCI_B0 Data ISR
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
RXData = UCB0RXBUF; // Get RX data
__bic_SR_register_on_exit(CPUOFF); // Exit LPM0
}
Hardy Hu：
//******************************************************************************
// MSP430G2xx3 Demo – USCI_B0 I2C Slave TX single bytes to MSP430 Master
//
// Description: This demo connects two MSP430's via the I2C bus. The master
// reads from the slave. This is the slave code. The TX data begins at 0
// and is incremented each time it is sent. An incoming start condition
// is used as a trigger to increment the outgoing data. The master checks the
// data it receives for validity. If it is incorrect, it stops communicating
// and the P1.0 LED will stay on. The USCI_B0 TX interrupt is used to know
// when to TX.
// ACLK = n/a, MCLK = SMCLK = default DCO = ~1.2MHz
//
// /|\ /|\
// MSP430G2xx3 10k 10k MSP430G2xx3
// slave | | master
// —————– | | —————–
// -|XIN P1.7/UCB0SDA|<-|—+->|P1.7/UCB0SDA XIN|-
// | | | | |
// -|XOUT | | | XOUT|-
// | P1.6/UCB0SCL|<-+—–>|P1.6/UCB0SCL |
// | | | P1.0|–> LED
//
// D. Dang
// Texas Instruments Inc.
// February 2011
// Built with CCS Version 4.2.0 and IAR Embedded Workbench Version: 5.10
//******************************************************************************
#include "msp430g2553.h"
unsigned char TXData;
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= BIT0; // P1.0 output
P1SEL |= BIT6 + BIT7; // Assign I2C pins to USCI_B0
P1SEL2|= BIT6 + BIT7; // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
UCB0I2COA = 0x48; // Own Address is 048h
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB0I2CIE |= UCSTTIE; // Enable STT interrupt
IE2 |= UCB0TXIE; // Enable TX interrupt
TXData = 0xff; // Used to hold TX data
while (1)
{
__bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts
}
}
// USCI_B0 Data ISR
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
UCB0TXBUF = TXData; // TX data
__bic_SR_register_on_exit(CPUOFF); // Exit LPM0
}
// USCI_B0 State ISR
#pragma vector = USCIAB0RX_VECTOR
__interrupt void USCIAB0RX_ISR(void)
{
UCB0STAT &= ~UCSTTIFG; // Clear start condition int flag
TXData++; // Increment data
}
Hardy Hu：
电阻应该是上拉，100K有点太大了，换成小一点的，上升沿会陡峭一些
Peter_Zheng：
i2c两线用电阻上拉。我调试过例程程序，通信没有问题。
Hardy Hu：
1.下拉会使SDA,SCL都hold住，IIC停止工作，IIC的SDA.SCL的无效态是高，一定要上拉；
2.需要注意的是在正常通讯时，SCL为高时，SDA数据有效，这时SDA数据要保持恒定，在SCL为低时，进行数据更新等操作；
Bill Kent：
回复 Hardy Hu:
还是不行，谢谢大家的回答。
