TI中文支持网这是一段官方的例程
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
{
switch(__even_in_range(UCA0IV,4))
{
case 0:break; // Vector 0 – no interrupt
case 2: // Vector 2 – RXIFG
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = UCA0RXBUF; // TX -> RXed character
break;
case 4:break; // Vector 4 – TXIFG
default: break;
}
}
请问这里的switch中case0，case2，case4分别是什么意思，如果我想让f5529接收到电脑传来的数据后点亮上面的一盏LED，相应的代码应该添加在什么位置？
kqian0327：
你好，
你可以把全部程序贴出来吗？
你知道你用的USCI_A0作为SPI还是串口来使用的？
UCA0IV是一个寄存器，他们共用一个中断源，不同的标志位表示不用原因的中断，但是都是USCI_A0接收到数据产生的中断。
所以swith case是为了根据不同原因，触发不同事件。
如果我想让f5529接收到电脑传来的数据后点亮上面的一盏LED，相应的代码应该添加在中断函数里面就可以了。
Boyuan Jiang：
回复 kqian0327:
你好，这个是完整的例程
/* –COPYRIGHT–,BSD_EX * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * –/COPYRIGHT–*///******************************************************************************// MSP430F552x Demo – USCI_A0, 115200 UART Echo ISR, DCO SMCLK//// Description: Echo a received character, RX ISR used. Normal mode is LPM0.// USCI_A0 RX interrupt triggers TX Echo.// Baud rate divider with 1048576hz = 1048576/115200 = ~9.1 (009h|01h)// ACLK = REFO = ~32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz// See User Guide for baud rate divider table//// MSP430F552x// —————–// /|\| |// | | |// –|RST |// | |// | P3.3/UCA0TXD|————>// | | 115200 – 8N1// | P3.4/UCA0RXD|<————//// Bhargavi Nisarga// Texas Instruments Inc.// April 2009// Built with CCSv4 and IAR Embedded Workbench Version: 4.21//******************************************************************************
#include <msp430.h>
int main(void){ WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P3SEL |= BIT3+BIT4; // P3.3,4 = USCI_A0 TXD/RXD UCA0CTL1 |= UCSWRST; // **Put state machine in reset** UCA0CTL1 |= UCSSEL_2; // SMCLK UCA0BR0 = 9; // 1MHz 115200 (see User's Guide) UCA0BR1 = 0; // 1MHz 115200 UCA0MCTL |= UCBRS_1 + UCBRF_0; // Modulation UCBRSx=1, UCBRFx=0 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, interrupts enabled __no_operation(); // For debugger}
// Echo back RXed character, confirm TX buffer is ready first#pragma vector=USCI_A0_VECTOR__interrupt void USCI_A0_ISR(void){ switch(__even_in_range(UCA0IV,4)) { case 0:break; // Vector 0 – no interrupt case 2: // Vector 2 – RXIFG while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready? UCA0TXBUF = UCA0RXBUF; // TX -> RXed character break; case 4:break; // Vector 4 – TXIFG default: break; }}
我是作为串口使用的，串口的接受和发送是共用一个中断吗？可不可以用两个中断，一个是接受，另一个是发送？
Triton Zhang：
回复 Boyuan Jiang:
注释写得很清楚啊，
0- 没有中断
2- 接收数据中断，当RXBUF非空时触发
4-发送数据中断，当TXBUF为空时触发
注意这里的发送数据中断，当TXBUF为空时触发，并不是说发送数据完成触发中断。而是当TXBUF的数据放入移位寄存器后就会触发。
