MSP430FR5989 UART串口初始化的问题

void UCA0_uart_init()

{

P2OUT &= ~(BIT0+BIT1);

P2DIR  &= ~(BIT0+BIT1);

P2REN &= ~(BIT0+BIT1);

P2SEL0 |= BIT0 + BIT1;

P2SEL1 &= ~(BIT0 + BIT1);

UCA0CTLW0 |= UCSWRST | UCSSEL__ACLK;  // Put eUSCI in reset, select ACLK; when ACLK = 32768

UCA0BR0 = 0x03; // 32000/9600 = 3.333     波特率9600

UCA0BR1 = 0x00;

UCA0MCTLW |= 0x4900;

UCA0CTL1 &=~ UCSWRST; // release from reset

UCA0IE |= UCRXIE; // Enable RX interrupt

}

的电压，发现TxD管脚的电压为高电平3.0V，RxD管脚悬空状态（电压一会0V，一会0.8V），请问这样正常吗，串口RxD管脚配置成这样有什么问题吗？

灰小子：

官网有例程的，建议先参考下例程

//******************************************************************************
//MSP430FR69xx Demo - eUSCI_A0 UART echo at 9600 baud using BRCLK = 8MHz
//
//Description: This demo echoes back characters received via a PC serial port.
//SMCLK/ DCO is used as a clock source and the device is put in LPM3
//The auto-clock enable feature is used by the eUSCI and SMCLK is turned off
//when the UART is idle and turned on when a receive edge is detected.
//Note that level shifter hardware is needed to shift between RS232 and MSP
//voltage levels.
//
//The example code shows proper initialization of registers
//and interrupts to receive and transmit data.
//To test code in LPM3, disconnect the debugger.
//
//ACLK = VLO, MCLK =DCO = SMCLK = 8MHz
//
//MSP430FR6989
//-----------------
//RST -|P2.0/UCA0TXD|----> PC (echo)
//||
//||
//|P2.1/UCA0RXD|<---- PC
//||
//
//William Goh
//Texas Instruments Inc.
//April 2014
//Built with IAR Embedded Workbench V5.60 & Code Composer Studio V6.0
//******************************************************************************
#include <msp430.h>int main(void)
{WDTCTL = WDTPW | WDTHOLD;// Stop Watchdog// Configure GPIOP2SEL0 |= BIT0 | BIT1;// USCI_A0 UART operationP2SEL1 &= ~(BIT0 | BIT1);// Disable the GPIO power-on default high-impedance mode to activate// previously configured port settingsPM5CTL0 &= ~LOCKLPM5;// Startup clock system with max DCO setting ~8MHzCSCTL0_H = CSKEY >> 8;// Unlock clock registersCSCTL1 = DCOFSEL_3 | DCORSEL;// Set DCO to 8MHzCSCTL2 = SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK;CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;// Set all dividersCSCTL0_H = 0;// Lock CS registers// Configure USCI_A0 for UART modeUCA0CTLW0 = UCSWRST;// Put eUSCI in resetUCA0CTLW0 |= UCSSEL__SMCLK;// CLK = SMCLK// Baud Rate calculation// 8000000/(16*9600) = 52.083// Fractional portion = 0.083// User's Guide Table 21-4: UCBRSx = 0x04// UCBRFx = int ( (52.083-52)*16) = 1UCA0BR0 = 52;// 8000000/16/9600UCA0BR1 = 0x00;UCA0MCTLW |= UCOS16 | UCBRF_1 | 0x4900;UCA0CTLW0 &= ~UCSWRST;// Initialize eUSCIUCA0IE |= UCRXIE;// Enable USCI_A0 RX interrupt__bis_SR_register(LPM3_bits | GIE);// Enter LPM3, interrupts enabled__no_operation();// For debugger
}#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{switch(__even_in_range(UCA0IV, USCI_UART_UCTXCPTIFG)){case USCI_NONE: break;case USCI_UART_UCRXIFG:while(!(UCA0IFG&UCTXIFG));UCA0TXBUF = UCA0RXBUF;__no_operation();break;case USCI_UART_UCTXIFG: break;case USCI_UART_UCSTTIFG: break;case USCI_UART_UCTXCPTIFG: break;}
}

user6052347：

回复 灰小子:

好的谢谢。那也就是串口的两个管脚默认配置为高阻状态了，还有UART的时钟源选择外部时钟ACLK应该没什么问题吧。

灰小子：

回复 user6052347:

看你的串口需要的波特率。ACLK一般是低速时钟，不能支持串口工作在较高的波特率。

如果工作在9600以上，推荐用smclk或者mclk。

user6052347：

回复 灰小子:

我刚好选在9600，那推荐用SMCLK或者MCLK吧

Susan Yang：

回复 user6052347:

(1) Peripherals are in a state that requires or uses a clock with a "high" frequency of more than 50 kHz.

(2) Peripherals are in a state that requires or uses a clock with a "low" frequency of 50 kHz or less.

另外建议看一下 http://www.ti.com/lit/ug/slau367o/slau367o.pdf 的 Table 30-5. Recommended Settings for Typical Crystals and Baud Rates

灰小子：

回复 user6052347:

9600用32.768k的aclk也可以的，误差会稍微大一点。一般应用问题也不大。