MSP430F5XX 库 时钟配置问题

在使用MSP430F5XX的库，发现定时器demo中没有系统时钟的初始化代码，上来就是配置定时器的参数，这是怎么回事？

void main(void)
{//Stop WDTWDT_A_hold(WDT_A_BASE);//Set P1.0 to output directionGPIO_setAsOutputPin(GPIO_PORT_P1,GPIO_PIN0);//Start timer in continuous mode sourced by ACLKTimer_A_clearTimerInterrupt(TIMER_A1_BASE);Timer_A_initContinuousModeParam param = {0};param.clockSource = TIMER_A_CLOCKSOURCE_ACLK;param.clockSourceDivider = TIMER_A_CLOCKSOURCE_DIVIDER_1;param.timerInterruptEnable_TAIE = TIMER_A_TAIE_INTERRUPT_ENABLE;param.timerClear = TIMER_A_DO_CLEAR;param.startTimer = true;Timer_A_initContinuousMode(TIMER_A1_BASE, &param);//Enter LPM0, enable interrupts__bis_SR_register(LPM0_bits + GIE);//For debugger__no_operation();
}

灰小子：

这个例程里定时器使用的是ACLK，ACLK默认上电时开启的，例程里也没有涉及到其他的ACLK的频率，所以不需要初始化。

如果使用其他时钟或不是默认的频率，要注意先配置时钟。

Susan Yang：

您可以看一下ucs.h内的说明

//! This function initializes each of the clock signals. The user must ensure
//! that this function is called for each clock signal. If not, the default
//! state is assumed for the particular clock signal. Refer MSP430Ware
//! documentation for UCS module or Device Family User's Guide for details of
//! default clock signal states.

//*****************************************************************************
//
//! \brief Initializes a clock signal
//!
//! This function initializes each of the clock signals. The user must ensure
//! that this function is called for each clock signal. If not, the default
//! state is assumed for the particular clock signal. Refer MSP430Ware
//! documentation for UCS module or Device Family User's Guide for details of
//! default clock signal states.
//!
//! \param selectedClockSignal selected clock signal
//!Valid values are:
//!- \b UCS_ACLK
//!- \b UCS_MCLK
//!- \b UCS_SMCLK
//!- \b UCS_FLLREF
//! \param clockSource is clock source for the selectedClockSignal
//!Valid values are:
//!- \b UCS_XT1CLK_SELECT
//!- \b UCS_VLOCLK_SELECT
//!- \b UCS_REFOCLK_SELECT
//!- \b UCS_DCOCLK_SELECT
//!- \b UCS_DCOCLKDIV_SELECT
//!- \b UCS_XT2CLK_SELECT
//! \param clockSourceDivider selected the clock divider to calculate
//!clocksignal from clock source.
//!Valid values are:
//!- \b UCS_CLOCK_DIVIDER_1 [Default]
//!- \b UCS_CLOCK_DIVIDER_2
//!- \b UCS_CLOCK_DIVIDER_4
//!- \b UCS_CLOCK_DIVIDER_8
//!- \b UCS_CLOCK_DIVIDER_12 - [Valid only for UCS_FLLREF]
//!- \b UCS_CLOCK_DIVIDER_16
//!- \b UCS_CLOCK_DIVIDER_32 - [Not valid for UCS_FLLREF]
//!
//! Modified bits of \b UCSCTL5 register, bits of \b UCSCTL4 register and bits
//! of \b UCSCTL3 register.
//!
//! \return None
//
//*****************************************************************************
extern void UCS_initClockSignal(uint8_t selectedClockSignal,uint16_t clockSource,uint16_t clockSourceDivider);

user4959119：

回复 灰小子:

是的

user4959119：

回复 Susan Yang:

嗯明白了，另外定时器参数 compareOutputMode是什么意思？我不想有任何外部输出，选择bit就可以了吗？

Susan Yang：

回复 user4959119:

uint16_t compareOutputMode;
//! Is the count to be compared with in compare mode

user4959119：

回复 Susan Yang:

我指的是这个，默认的bitValue是啥含义？

//! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE [Default]//! - \b TIMER_A_OUTPUTMODE_SET//! - \b TIMER_A_OUTPUTMODE_TOGGLE_RESET//! - \b TIMER_A_OUTPUTMODE_SET_RESET//! - \b TIMER_A_OUTPUTMODE_TOGGLE//! - \b TIMER_A_OUTPUTMODE_RESET//! - \b TIMER_A_OUTPUTMODE_TOGGLE_SET//! - \b TIMER_A_OUTPUTMODE_RESET_SETuint16_t compareOutputMode;

Susan Yang：

回复 user4959119:

TIMER_A_OUTPUTMODE_OUTBITVALUE 表示 输出由TACCTLx的OUT位直接控制

灰小子：

回复 user4959119:

建议楼主先找个msp430f5的教程看一下，然后再对照数据手册看例程，就很容易理解了。

http://bbs.21ic.com/icview-584664-1-1.html

user4959119：

回复 灰小子:

谢谢