我在ADC12CONSEQ中选择序列通道重复转换模式,我给A0、A1送入了电压,但ADC12MEM2和ADC12MEM3也有数值,与ADC12MEM1里的数值相近。我给A0、A2送入电压,ADC12MEM1和ADC12MEM3里的数值也与ADC12MEM2里的数值相似,这是为什么?
还有我设置ADC12INCH选择模拟输入通道什么用都没有,我看没有效果,这是为什么?
还有ADC12CSTARTADDx不用按照Ax来设置吧,就是A0不是一定对应ADC12CSTARTADD0吧! 还有在单次转换里,用A0和A1,好像只使用一个ADC12CSTARTADDx就可以,不用每个A0和A1都使用一个存储寄存器吧?
谢谢大佬们,爱你们哦!!!!!
灰小子:
给A0、A1送入了电压的时候,A2是否在悬空?
悬空的io电平状态会由周围的电磁环境决定。
其他问题建议调试的时候追一下对应寄存器内数值的变化,就清楚了。
Susan Yang:
请您参考下下面的代码
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For this the code may rely on the device's power-on default* register values and settings such as the clock configuration and care must* be taken when combining code from several examples to avoid potential side* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware* for an API functional library-approach to peripheral configuration.** --/COPYRIGHT--*/ //****************************************************************************** //MSP430F552x Demo - ADC12, Sequence of Conversions (non-repeated) // //Description: This example shows how to perform A/D conversions on a sequence //of channels. A single sequence of conversions is performed - one conversion //each on channels A0, A1, A2, and A3. Each conversion uses AVcc and AVss for //the references. The conversion results are stored in ADC12MEM0, ADC12MEM1, //ADC12MEM2, and ADC12MEM3 respectively and are moved to 'results[]' upon //completion of the sequence. Test by applying voltages to pins A0, A1, A2, //and A3, then setting and running to a break point at the "_BIC..." //instruction in the ISR. To view the conversion results, open a watch window //in debugger and view 'results' or view ADC12MEM0, ADC12MEM1, ADC12MEM2, and //ADC12MEM3 in an ADC12 SFR window. //This can run even in LPM4 mode as ADC has its own clock //Note that a sequence has no restrictions on which channels are converted. //For example, a valid sequence could be A0, A3, A2, A4, A2, A1, A0, and A7. //See the MSP430x5xx User's Guide for instructions on using the ADC12. // //MSP430F552x //----------------- ///|\|| //| || //--|RST| //|| //Vin0 -->|P6.0/CB0/A0| //Vin1 -->|P6.1/CB1/A1| //Vin2 -->|P6.2/CB2/A2| //Vin3 -->|P6.3/CB3/A3| //|| // //Bhargavi Nisarga //Texas Instruments Inc. //April 2009 //Built with CCSv4 and IAR Embedded Workbench Version: 4.21 //******************************************************************************#include <msp430.h>volatile unsigned int results[4];// Needs to be global in this example// Otherwise, the compiler removes it// because it is not used for anything.int main(void) {WDTCTL = WDTPW+WDTHOLD;// Stop watchdog timerP6SEL = 0x0F;// Enable A/D channel inputsADC12CTL0 = ADC12ON+ADC12MSC+ADC12SHT0_2; // Turn on ADC12, set sampling timeADC12CTL1 = ADC12SHP+ADC12CONSEQ_1;// Use sampling timer, single sequenceADC12MCTL0 = ADC12INCH_0;// ref+=AVcc, channel = A0ADC12MCTL1 = ADC12INCH_1;// ref+=AVcc, channel = A1ADC12MCTL2 = ADC12INCH_2;// ref+=AVcc, channel = A2ADC12MCTL3 = ADC12INCH_3+ADC12EOS;// ref+=AVcc, channel = A3, end seq.ADC12IE = 0x08;// Enable ADC12IFG.3ADC12CTL0 |= ADC12ENC;// Enable conversionswhile(1){ADC12CTL0 |= ADC12SC;// Start convn - software trigger__bis_SR_register(LPM4_bits + GIE);// Enter LPM4, Enable interrupts__no_operation();// For debugger} }#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=ADC12_VECTOR __interrupt void ADC12ISR (void) #elif defined(__GNUC__) void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12ISR (void) #else #error Compiler not supported! #endif {switch(__even_in_range(ADC12IV,34)){case0: break;// Vector0:No interruptcase2: break;// Vector2:ADC overflowcase4: break;// Vector4:ADC timing overflowcase6: break;// Vector6:ADC12IFG0case8: break;// Vector8:ADC12IFG1case 10: break;// Vector 10:ADC12IFG2case 12:// Vector 12:ADC12IFG3results[0] = ADC12MEM0;// Move results, IFG is clearedresults[1] = ADC12MEM1;// Move results, IFG is clearedresults[2] = ADC12MEM2;// Move results, IFG is clearedresults[3] = ADC12MEM3;// Move results, IFG is cleared__bic_SR_register_on_exit(LPM4_bits);// Exit active CPU, SET BREAKPOINT HEREcase 14: break;// Vector 14:ADC12IFG4case 16: break;// Vector 16:ADC12IFG5case 18: break;// Vector 18:ADC12IFG6case 20: break;// Vector 20:ADC12IFG7case 22: break;// Vector 22:ADC12IFG8case 24: break;// Vector 24:ADC12IFG9case 26: break;// Vector 26:ADC12IFG10case 28: break;// Vector 28:ADC12IFG11case 30: break;// Vector 30:ADC12IFG12case 32: break;// Vector 32:ADC12IFG13case 34: break;// Vector 34:ADC12IFG14default: break;} }