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TMS320F28388D: 烧录程序时候报错,错误代码-1135

Part Number:TMS320F28388D

IcePick_C_0: Error connecting to the target: (Error -180 @ 0x0) The controller has detected a target power loss. The user must turn-on or connect the power supply for the target. (Emulation package 9.11.0.00128) 

我在verify成功了

[Start]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]

—–[Print the board config pathname(s)]————————————

C:\Users\86180\AppData\Local\TEXASI~1\CCS\
ccs_12.3\0\0\BrdDat\testBoard.dat

—–[Print the reset-command software log-file]—————————–

This utility has selected a 100/110/510 class product.
This utility will load the adapter 'jioserdesusbv3.dll'.
The library build date was 'Mar 10 2023'.
The library build time was '17:27:27'.
The library package version is '9.11.0.00128'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

—–[Print the reset-command hardware log-file]—————————–

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

—–[The log-file for the JTAG TCLK output generated from the PLL]———-

Test Size Coord MHz Flag Result Description
~~~~ ~~~~ ~~~~~~~ ~~~~~~~~ ~~~~ ~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~
1 64 – 01 00 500.0kHz O good value measure path length
2 64 + 00 00 1.000MHz [O] good value apply explicit tclk

There is no hardware for measuring the JTAG TCLK frequency.

In the scan-path tests:
The test length was 2048 bits.
The JTAG IR length was 6 bits.
The JTAG DR length was 1 bits.

The IR/DR scan-path tests used 2 frequencies.
The IR/DR scan-path tests used 500.0kHz as the initial frequency.
The IR/DR scan-path tests used 1.000MHz as the highest frequency.
The IR/DR scan-path tests used 1.000MHz as the final frequency.

—–[Measure the source and frequency of the final JTAG TCLKR input]——–

There is no hardware for measuring the JTAG TCLK frequency.

—–[Perform the standard path-length test on the JTAG IR and DR]———–

This path-length test uses blocks of 64 32-bit words.

The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.

The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.

—–[Perform the Integrity scan-test on the JTAG IR]————————

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

—–[Perform the Integrity scan-test on the JTAG DR]————————

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End]

板子是自己画的,供电是两个buck电路,5V转3.3V和5V转1.2V,万用表测出来分别是3.26V和1.19V,感觉也没啥问题。3.3V和DGND之间的阻抗是3.77KΩ,1.2V和DGND之间的阻抗是2.12kΩ

感觉供电也没有问题,不太理解为什么无法烧程序

Ben Qin:

我查看下相关资料,稍后回复您。

,

?? ?:

我更改了我的复位电路,然后发现有时候偶尔几次可以烧录进去,然后我怀疑是不是芯片没焊接好,我就拆下来重新焊接了,发现现在Connection test都开始报错,报-233的错误代码,我供电也没问题,晶振也起振了,测试XRSn信号会有周期性置低的现象。XRSn信号接口和3.3V之间接了4.7KΩ电阻,和DGND之间接了100nF的电容。感觉还是硬件有问题。

,

Ben Qin:

?? ? 说:报-233的错误代码,

可以在下面这个链接查看下相关错误:

software-dl.ti.com/…/ccsv7_debugging_jtag_connectivity_issues.html

?? ? 说:测试XRSn信号会有周期性置低的现象

flash是空的吗?如果是,看门狗将超时并重复reset设备。

,

?? ?:

新的芯片,没烧过flash芯片,烧过ram芯片,但是有时候能烧,有时候烧不进去

,

Ben Qin:

参考下这篇帖子看是否有帮助:

e2e.ti.com/…/tms320f28377d-will-the-device-reset-repeatedly-when-powered-without-any-program-loaded

,

?? ?:

你好,我已经解决了,我重新焊了一块板子,然后就可以了。虽然每太理清是哪里的问题

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