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TMS320C6678: 在向0x8000 0000这个地址写入一个4字节的数据时,发现0xA000 0000, 0xC000 0000, 0xE000 0000等地址内的数据也出现了该数据

Part Number:TMS320C6678Other Parts Discussed in Thread: SYSBIOS

Hi~

环境说明:

DSP型号:TMS320C6678

DDR3:DDR3外接4片 4Gb/16bit的DDR3表贴内存颗粒,设计为单rank

我在使用C6678这款DSP调试DDR时,出现了一个不太理解的现象:向0x8000 0000这个地址写入一个4字节的数据时,发现0xA000 0000, 0xC000 0000等地址内的数据也出现了该数据。

如下是我的DDR测试代码:

uint32_t sdr_read_uint32(uint32_t addr)
{return * (uint32_t *)addr;
}

void ddr_test()
{sdk_write_uint32(0x80000000, 0x01111111*0x8);sdk_write_uint32(0x90000000, 0x01111111*0x9);sdk_write_uint32(0xa0000000, 0x01111111*0xa);sdk_write_uint32(0xb0000000, 0x01111111*0xb);sdk_write_uint32(0xc0000000, 0x01111111*0xc);sdk_write_uint32(0xd0000000, 0x01111111*0xd);sdk_write_uint32(0xe0000000, 0x01111111*0xe);sdk_write_uint32(0xf0000000, 0x01111111*0xf);return;
}

向0x8000 0000写入数据0x0888 8888时,发现0xA000 0000, 0xC000 0000, 0xE000 0000这些地址的内容也被写为了 0x0888 8888。如下图所示:

该问题我进行了如下的分析工作:

1. 通过分析汇编,STW的目的地址也是0x8000 0000,不是0xA000 0000。因此感觉不太像是软件的逻辑问题;

2. 我也怀疑过可能是多核的内存共享可能由影响,但是将我的platform中External Memory的DDR3设置为如下配置后,还是存在该问题。

3. 怀疑可能与多核有关系,我将我的.cfg文件中的多核配置改为了单核,对应的配置文件如下,还是存在此问题:

var BIOS= xdc.useModule('ti.sysbios.BIOS');
var Task= xdc.useModule('ti.sysbios.knl.Task');
var cslSettings = xdc.useModule ('ti.csl.Settings');
var Cppi = xdc.loadPackage('ti.drv.cppi');
var Qmss = xdc.loadPackage('ti.drv.qmss');
var Srio = xdc.loadPackage('ti.drv.srio');
var HWI	= xdc.useModule ('ti.sysbios.hal.Hwi');
var CPINTC  = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
var ECM= xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
var Pa = 	xdc.useModule('ti.drv.pa.Settings');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var Mailbox = xdc.useModule('ti.sysbios.knl.Mailbox');
var Memory  =xdc.useModule('xdc.runtime.Memory');
var Notify= xdc.useModule('ti.sdo.ipc.Notify');
var Ipc= xdc.useModule('ti.sdo.ipc.Ipc');

//多核相关
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
//MultiProc.numProcessors = 8;
//MultiProc.setConfig(null, ["CORE0", "CORE1", "CORE2", "CORE3","CORE4","CORE5","CORE6","CORE7"]);
MultiProc.numProcessors = 1;
//MultiProc.setConfig(null, ["CORE0", "CORE1", "CORE2"]);
MultiProc.setConfig(null, ["CORE0"]);

/* Required if using System_printf to output on the console */
var System = xdc.useModule('xdc.runtime.System');
var SysStd		=xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy=SysStd;



var PlatformLib  = xdc.loadPackage('ti.platform.evmc6678l');
var NdkTransport = xdc.loadPackage('ti.transport.ndk');

ECM.eventGroupHwiNum[0] = 7;
ECM.eventGroupHwiNum[1] = 8;
ECM.eventGroupHwiNum[2] = 9;
ECM.eventGroupHwiNum[3] = 10;

//面两条6678初始化被RYB注释掉,初始化移至MAIN函数中执行
//Startup = xdc.useModule('xdc.runtime.Startup');
//Startup.firstFxns.$add('&C6678_init');

var Global= xdc.useModule('ti.ndk.config.Global');
Global.enableCodeGeneration = false;


//BIOS.heapSize	= 0x10000;

var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var heapMemParams = new HeapMem.Params();
heapMemParams.size = 0x200000;
heapMemParams.sectionName = "systemHeap";
Program.global.heap0 = HeapMem.create(heapMemParams);

/* This is the default memory heap. */
Memory.defaultHeapInstance  =Program.global.heap0;

/*
** Create the stack Thread Task for our application.
*/

var Exception = xdc.useModule('ti.sysbios.family.c64p.Exception');
Exception.enablePrint = true;


/* To avoid wasting shared memory for Notify and MessageQ transports */
for (var i = 0; i < MultiProc.numProcessors; i++) {Ipc.setEntryMeta({remoteProcId: i,setupMessageQ: false,});
}

/* Synchronize all processors (this will be done in Ipc_start) */
Ipc.procSync = Ipc.ProcSync_ALL;

/*
 *  Need to define the shared region. The IPC modules use this
 *  to make portable pointers. All processors need to add this
 *  call with their base address of the shared memory region.
 *  If the processor cannot access the memory, do not add it.
 */
var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
SharedRegion.setEntryMeta(0,{ base: 0x0C180000,len:  0x00080000,ownerProcId: 0,isValid: true,name: "MSMCSRAM_IPC",});


Program.sectMap[".srioSharedMem"] = "L2SRAM"; //DDR3
Program.sectMap[".boot_sect"]  = "L2SRAM";

Program.sectMap["sharedL2"] = "MSMCSRAM";
Program.sectMap["systemHeap"] = "MSMCSRAM";
Program.sectMap[".sysmem"]  = "MSMCSRAM";
Program.sectMap[".args"]= "MSMCSRAM";
Program.sectMap[".cio"]= "MSMCSRAM";
Program.sectMap[".far"] 	= 	"MSMCSRAM";
Program.sectMap[".rodata"] 	= 	"MSMCSRAM";
Program.sectMap[".neardata"] 	= 	"MSMCSRAM";
Program.sectMap[".cppi"] 	= 	"MSMCSRAM";
Program.sectMap[".init_array"] 	= 	"MSMCSRAM";
Program.sectMap[".qmss"] 	= 	"MSMCSRAM";
Program.sectMap[".cinit"] 	= 	"MSMCSRAM";
Program.sectMap[".bss"]		=	"MSMCSRAM";
Program.sectMap[".const"]	=	"MSMCSRAM";
Program.sectMap[".text"]	=	"MSMCSRAM";
Program.sectMap[".code"]	=	"MSMCSRAM";
Program.sectMap[".switch"]	=	"MSMCSRAM";
Program.sectMap[".data"]	=	"MSMCSRAM";
Program.sectMap[".fardata"] = 	"MSMCSRAM";
Program.sectMap[".args"] 	= 	"MSMCSRAM";
Program.sectMap[".cio"] 	= 	"MSMCSRAM";
Program.sectMap[".vecs"] 	= 	"MSMCSRAM";
Program.sectMap["platform_lib"] 	= 	"MSMCSRAM";
Program.sectMap["TI_platform_lib"] 	= 	"MSMCSRAM";
Program.sectMap[".far:taskStackSection"] = "MSMCSRAM";
Program.sectMap[".stack"]	=	"L2SRAM";
Program.sectMap[".nimu_eth_ll2"] = "L2SRAM";
Program.sectMap[".resmgr_memregion"] = {loadSegment: "L2SRAM", loadAlign:128};	/* QMSS descriptors region 	*/
Program.sectMap[".resmgr_handles"] = {loadSegment: "L2SRAM", loadAlign:16};	/* CPPI/QMSS/PA Handles			*/
Program.sectMap[".resmgr_pa"]	= {loadSegment: "L2SRAM", loadAlign:8};		/* PA Memory					*/
Program.sectMap[".far:IMAGEDATA"] = {loadSegment: "L2SRAM", loadAlign: 8};
Program.sectMap[".far:NDK_OBJMEM"] = {loadSegment: "L2SRAM", loadAlign: 8};
Program.sectMap[".far:NDK_PACKETMEM"] = {loadSegment: "L2SRAM", loadAlign: 128};
Program.sectMap[".msm_user"] = 	"MSMCSRAM";

Program.sectMap[".NDKDESC"] = 	"MSMCSRAM";//MSMCSRAM
Program.sectMap[".csl_vect"] = 	"MSMCSRAM";//MSMCSRAM

/* 自定义 */
Program.sectMap[".revcomad"] ="MSMCSRAM";
Program.sectMap[".msmc_slave_addr"] ="MSMCSRAM";
Program.sectMap[".data_ddr"] ="DDR3";

请大佬帮忙看看,出现这个现象是什么原因? 

谢谢!

Nancy Wang:

您使用的是TMDXEVM6678LE REV1.0开发板吗?该板子上是512Mbyte的DDR,所以访问会以512M为间隔重复,详细请参考以下帖子的最后一条回复。

e2echina.ti.com/…/tms320c6678-tmdxevm667le-memset-ddr

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