TI中文支持网Part Number:TMS320F28377DOther Parts Discussed in Thread:SYSBIOS,
Dear experts:
When I define a variable at the RAM from CPU to CLA.
I have a problem about the configuration of CMD file .
The error of compiler is as bellow：
<a href="file:/C:/ti/ccs1020/ccs/tools/compiler/dmed/HTML/10099.html">#10099-D</a> program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. run placement with alignment/blocking fails for section "Cla1Prog" size 0x84e page 0. Available memory ranges:
I increase the FLASHD space,but it still has problems.
The following is my CMD files:
/*
可以在CLA/SYSBIOS 条件下运行
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* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* ======== TMS320F28377D.cmd ========
* Define the memory block start/length for the F28377D
*/
// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> –define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
–undef_sym=__cla_scratchpad_end
–undef_sym=__cla_scratchpad_start
#endif //CLA_C
MEMORY
{
PAGE 0 : /* Program Memory */
/* BEGIN is used for the "boot to FLASH" bootloader mode */
D01SARAM : origin = 0x00B000, length = 0x001000
LS0SARAM : origin = 0x008000, length = 0x00800 /* on-chip RAM */
LS5SARAM : origin = 0x00A800, length = 0x000800 /* on-chip RAM */
/* Flash boot address */
BEGIN : origin = 0x080000, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
#if 1
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHEF : origin = 0x088000, length = 0x010000 /* on-chip Flash */
#endif
//FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
RESET : origin = 0x3FFFC0, length = 0x000002
PAGE 1 : /* Data Memory */
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom
will use this for
stack */
M01SARAM : origin = 0x000122, length = 0x0006DE /* on-chip RAM */
//LS0SARAM : origin = 0x008000, length = 0x00800 /* on-chip RAM */
LS14SARAM : origin = 0x008800, length = 0x002000 /* on-chip RAM */
/* on-chip Global shared RAMs */
//RAMGS0 : origin = 0x00C000, length = 0x001000
//RAMGS1 : origin = 0x00D000, length = 0x001000
//RAMGS2 : origin = 0x00E000, length = 0x001000
//RAMGS3 : origin = 0x00F000, length = 0x001000
//RAMGS4 : origin = 0x010000, length = 0x001000
//RAMGS5 : origin = 0x011000, length = 0x001000
//RAMGS6 : origin = 0x012000, length = 0x001000
//RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS07 : origin = 0x00C000, length = 0x008000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000
/* Shared MessageRam */
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.binit : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
#ifdef __TI_EABI__
.init_array : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
#else
.pinit : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
#endif
.text : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
RUN = RAMGS07 PAGE = 1
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd)
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0,
RUN = LS14SARAM PAGE = 1,
table(BINIT)
#endif
#endif
/* Allocate uninitalized data sections: */
.stack : > M01SARAM | RAMGS07 PAGE = 1
#ifdef __TI_EABI__
.bss : > M01SARAM | LS14SARAM PAGE = 1
.sysmem : > RAMGS07 | M01SARAM PAGE = 1
#else
.ebss : > M01SARAM | LS14SARAM PAGE = 1
.esysmem : > RAMGS07 | M01SARAM PAGE = 1
#endif
.data : > M01SARAM | RAMGS07 PAGE = 1
.cio : > RAMGS07 | M01SARAM PAGE = 1
/* Initalized sections go in Flash */
#ifdef __TI_EABI__
.const : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
#else
.econst : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
#endif
.switch : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.args : > FLASHA | FLASHB | FLASHC | FLASHD | FLASHEF |
FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
Filter_RegsFile : > RAMGS07 | RAMGS8 | RAMGS9 |
RAMGS10 | RAMGS11 | RAMGS12 | RAMGS13 | RAMGS14 |
RAMGS15 PAGE = 1
User_RegsFile : > RAMGS07 | RAMGS8 | RAMGS9 |
RAMGS10 | RAMGS11 | RAMGS12 | RAMGS13 | RAMGS14 |
RAMGS15 PAGE = 1
.Bios_Stack : > RAMGS07 | RAMGS8 | RAMGS9 |
RAMGS10 | RAMGS11 | RAMGS12 | RAMGS13 | RAMGS14 |
RAMGS15 PAGE = 1
/* CLA specific sections */
#if defined(__TI_EABI__)
Cla1Prog : LOAD = FLASHD,
RUN = LS5SARAM,
LOAD_START(Cla1funcsLoadStart),
LOAD_END(Cla1funcsLoadEnd),
RUN_START(Cla1funcsRunStart),
LOAD_SIZE(Cla1funcsLoadSize),
PAGE = 0, ALIGN(8)
#else
Cla1Prog : LOAD = FLASHD,
RUN = LS5SARAM,
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
LOAD_SIZE(_Cla1funcsLoadSize),
PAGE = 0, ALIGN(8)
#endif
CLADataLS0 : > LS0SARAM, PAGE = 0
CLADataLS1 : > LS0SARAM, PAGE = 0
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > LS0SARAM, PAGE = 0
.scratchpad : > LS0SARAM, PAGE = 0
.bss_cla : > LS0SARAM, PAGE = 0
.const_cla : LOAD = FLASHB,
RUN = LS0SARAM, PAGE = 0
RUN_START(Cla1ConstRunStart),
LOAD_START(Cla1ConstLoadStart),
LOAD_SIZE(Cla1ConstLoadSize)
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
}
Yale Li：
I have already post your issue to the relevant engineer:
https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1218075/tms320f28377d-cmd-fille-is-err
Thanks for your patience.
,
Yale Li：
You can request the customer to try using the region FLASHEF instead of FLASHD. From the error, it looks like FLASHD does not have enough space to accomodate the Cla1Prog code. Observed that FLASHD is also used in other sections of the linker command and hence may not have the required space (0x84e).
