TDA4VM: PCIE reference clock select problem

Hi: 

We are trying to ling TDA4VM(EP) to other device(RC) with PCIE. But TDA4 is failed to be enumerated by the RC.

In most cases, the PCIE_USER_LINKSTATUS of TDA4 is 0x03000005, 0x03000001, or 0x04000005 which means that LTSSM is 03 or 04.
At the same time, the register CFG_LINK_STATUS_CONTROL of RC, Field DLL is 1, which means that Data Link Layer is up. In some cases DLL is still 0.

If luck favors us, TDA4 can be successfully enumerated by RC. However the content of the configuration-space (RC)is incorrect: Device number, vendor number is offset by 4bytes with 0xffffffff.
Meanwhile, LTSSM returns to 0x04000005.

Can we judge from the above information that the connection failure is caused by different clock sources?

It seems that the TDA4 side driver uses its internal clock by default, not the external reference clock.

Can you provide a configuration method for the external reference clock.

lvan

Cherry Zhou：

Hi we've got the issue and escalated to e2e, please expect the response. Thanks.

,

Linjun：

The PCIe spec requires the reference clock to be 100MHz +/- 30KHz on both sides of the link. A 99.7MHz clock is -300KHz, so the RC and EP will likely not be able to link up.