根据数据手册,通过外部电路可以控制四路电源的使能端,从而达到需要的上电顺序。但其默认上电之间有5ms的延迟。我不确定这个5ms会不会对FPGA正常启动产生影响,想咨询一下。
(这个5ms,应该不能通过外部电路来调节吧(主要是时间变小))
According to the data manual, the external circuit can control the enable end of the four power supplies, so as to achieve the required power on sequence. However, there is a 5ms delay between power on by default. I'm not sure if this 5ms will affect the normal startup of FPGA. I want to consult.
(this 5ms should not be adjusted by external circuit (mainly because the time becomes smaller))
Johnsin Tao:
Hi具体你要通过电路来验证的,或者你要看PFGA在时序上的要求, 然后再来看能够通过电源控制实现时序。