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单相逆变器采样单极性或者双极性SPWM

我的EPWM配置,H桥的配置

//========================// EPWM Module 3 config
    // Setup TBCLK
    EPwm3Regs.TBPRD = 3000;                      // Period = 3000 TBCLK counts
    EPwm3Regs.TBPHS.half.TBPHS = 0;                     // Set Phase register to zero
    EPwm3Regs.TBCTR = 0;
    EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;         // Sync down-stream module
    // Setup counter mode
    EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;      // Symmetrical mode
    EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;             // Master module
    EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;            // Clock ratio to SYSCLKOUT
    EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
    EPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    // Set shadowing
    EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;       // load on CTR=Zero
    EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;       // load on CTR=Zero
    // Set actions
    EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;                  // set actions for EPWM1A
    EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;
    EPwm3Regs.AQCTLA.bit.CBU = AQ_CLEAR;                  
    EPwm3Regs.AQCTLA.bit.CBD = AQ_SET;
    //EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
    EPwm3Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;
    
    EPwm3Regs.AQCTLB.bit.CAU = AQ_CLEAR;                  // set actions for EPWM1A
    EPwm3Regs.AQCTLB.bit.CAD = AQ_SET;
    EPwm3Regs.AQCTLB.bit.CBU = AQ_SET;                  // set actions for EPWM1A
    EPwm3Regs.AQCTLB.bit.CBD = AQ_CLEAR;
    EPwm3Regs.AQCTLB.bit.ZRO = AQ_SET;
    EPwm3Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;
    //设定什么时候产生ADC SOC
    EPwm3Regs.ETSEL.bit.SOCAEN    = 1 ;        // 在EPWM3A上使能ADC启动采样
       EPwm3Regs.ETSEL.bit.SOCASEL    = 2 ;        // 当计数器为零(1)和等于周期值(2)时均(3)启动AD采样
       EPwm3Regs.ETPS.bit.SOCAPRD     = 1 ;        // 每发生一个事件启动一次AD采样
    
    EPwm3Regs.DBCTL.bit.HALFCYCLE = 0;
    EPwm3Regs.DBCTL.bit.IN_MODE = DBA_ALL;              // 死区延时的上升沿和下降沿都是EPWMA所在波形
    EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;           // Active Hi complementary
    EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;      // enable Dead-band module
    EPwm3Regs.DBRED = 60;
    EPwm3Regs.DBFED = 60;
//  EPWM Module 4 config
    // Setup TBCLK
    EPwm4Regs.TBPRD = 3000;                  // Period = 1600 TBCLK counts
    EPwm4Regs.TBPHS.half.TBPHS = 0;                 // Set Phase register to zero
    EPwm3Regs.TBCTR = 0;
    EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;      // sync flow-through
    // Setup counter mode
    EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;  // Symmetrical mode
    EPwm4Regs.TBCTL.bit.PHSEN = 0;          // Slave module TB_ENABLE
    EPwm4Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm4Regs.TBCTL.bit.PHSDIR = 0;
    EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;        // Clock ratio to SYSCLKOUT
    EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1;           // Slow just to observe on the scope
    // Setup shadowing
    EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;   // load on CTR=Zero
    EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;   // load on CTR=Zero
    //Setup actions
    EPwm4Regs.AQCTLA.bit.CAU = AQ_SET;                  // set actions for EPWM1A
    EPwm4Regs.AQCTLA.bit.CAD = AQ_CLEAR;
    EPwm4Regs.AQCTLA.bit.CBU = AQ_CLEAR;                  
    EPwm4Regs.AQCTLA.bit.CBD = AQ_SET;
    //EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
    EPwm4Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;
    
    EPwm4Regs.AQCTLB.bit.CAU = AQ_CLEAR;                  // set actions for EPWM1A
    EPwm4Regs.AQCTLB.bit.CAD = AQ_SET;
    EPwm4Regs.AQCTLB.bit.CBU = AQ_SET;                  // set actions for EPWM1A
    EPwm4Regs.AQCTLB.bit.CBD = AQ_CLEAR;
    EPwm4Regs.AQCTLB.bit.ZRO = AQ_SET;
    EPwm4Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;
    
    EPwm4Regs.DBCTL.bit.HALFCYCLE = 0;
    EPwm4Regs.DBCTL.bit.IN_MODE = DBB_ALL;           //DBA_RED_DBB_FED  DBB_RED_DBA_FED   DBA_ALL    
    EPwm4Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;       // DB_ACTV_LOC DB_ACTV_HIC
    EPwm4Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
            
    EPwm4Regs.DBRED = 60;
    EPwm4Regs.DBFED = 60;

如果采样单电压环控制的话,PI运算后,怎么给EPWM3和EPWM4的CMPA和CMPB赋值呀?分别双极性和单极性的?

qiang wang4:

请问这个问题解决了吗?

单纯的不经过pi运算的CMPA CMPB算出来了吗

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