TMS320F28388D: 应用CM的I2C对EEPROM进行存储

应用I2C怎么进行读写，发送帧应包括 ：从机地址-内存地址高-内存地址低-数据

从机地址：  I2C_setSlaveAddress(I2C0_BASE,SLAVE_ADDRESS_Write>>1,I2C_MASTER_WRITE);这样发送对不？

内存地址高：

内存地址低：我不知道怎么配置，

发送数据：I2C_putMasterData(I2C0_BASE, 0x0F); I2C_setMasterConfig(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);不知道对不对，每次发送都要写I2C_setMasterConfig(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);吗；

0049CPU的I2C写操作：

p->pI2cRegs->I2CCNT = 2 + p->Txd_num; //Txd_num < 8;   在CM中怎么体现，如何实现多数据发送
p->pI2cRegs->I2CFFTX.bit.TXFFRST = 1; 
p->pI2cRegs->I2CDXR.all= p->Addr >> 8;
p->pI2cRegs->I2CDXR.all = p->Addr & 0x00FF;
for (i = 0; i < p->Txd_num; i++) p->pI2cRegs->I2CDXR.all = p->Msg_Buff[i];
p->pI2cRegs->I2CMDR.all = 0x6E20;

DSP应用：

I2C_setMasterBurstLength(I2C0_BASE,8); ui32DataRx = I2C_getMasterBurstCount(I2C0_BASE);

设置长度后为什么都读不回来？？

,

Susan Yang：

已经将您的问题转给了对应的FAE了，请等待其回复

,

DSP应用：

I2CMCS_WRITE 和  2CMCS是什么关系？为什么offset是一样的，功能不同，两者offset都是相对于谁的？

,

Susan Yang：

我会在确认后给您回复

,

DSP应用：

你好，有没有消息啊

,

Susan Yang：

目前还没有，我在E2E上发帖了，您可以跟踪一下

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1028768/tms320f28388d-i2c-registers 

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DSP应用：

FAE的消息呢

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Susan Yang：

请看一下私信

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DSP应用：

有没有回复，地址为什么重复的（offset），FAE太水了，写了两天都没搞定

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Susan Yang：

目前还没有回复，我又追问了一下

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DSP应用：

FAE说  寄存器可以设置为读和写的内容不同   我就想不通，同一个地址1就是1 就是0，而且write寄存器为啥就不让看呢

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DSP应用：

//#############################################################################
//
// FILE:cm_common_config_c28x.c
//
// TITLE:C28x Common Configurations to be used for the CM Side.
//
//! \addtogroup driver_example_list
//! <h1>C28x Common Configurations</h1>
//!
//! This example configures the GPIOs and Allocates the shared peripherals
//! according to the defines selected by the users.
//!
//
//#############################################################################
// $TI Release: F2838x Support Library v3.04.00.00 $
// $Release Date: Fri Feb 12 19:08:49 IST 2021 $
// $Copyright:
// Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without// modification, are permitted provided that the following conditions// are met:
////Redistributions of source code must retain the above copyright//notice, this list of conditions and the following disclaimer.
////Redistributions in binary form must reproduce the above copyright
//notice, this list of conditions and the following disclaimer in the//documentation and/or other materials provided with the//distribution.
////Neither the name of Texas Instruments Incorporated nor the names of
//its contributors may be used to endorse or promote products derived
//from this software without specific prior written permission.
//// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################//
// Included Files
//
#include "driverlib.h"
#include "device.h"void main(void)
{//// Initialize device clock and peripherals//Device_init();//// Boot CM core//
#ifdef _FLASHDevice_bootCM(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
#elseDevice_bootCM(BOOTMODE_BOOT_TO_S0RAM);
#endif//// Disable pin locks and enable internal pull-ups.//Device_initGPIO();#ifdef ETHERNET//// Set up EnetCLK to use SYSPLL as the clock source and set the// clock divider to 2.//// This way we ensure that the PTP clock is 100 MHz. Note that this value// is not automatically/dynamically known to the CM core and hence it needs// to be made available to the CM side code beforehand.SysCtl_setEnetClk(SYSCTL_ENETCLKOUT_DIV_2, SYSCTL_SOURCE_SYSPLL);//// Configure the GPIOs for ETHERNET.////// MDIO Signals//GPIO_setPinConfig(GPIO_105_ENET_MDIO_CLK);GPIO_setPinConfig(GPIO_106_ENET_MDIO_DATA);//// Use this only for RMII Mode//GPIO_setPinConfig(GPIO_73_ENET_RMII_CLK);//////MII Signals//GPIO_setPinConfig(GPIO_109_ENET_MII_CRS);GPIO_setPinConfig(GPIO_110_ENET_MII_COL);GPIO_setPinConfig(GPIO_75_ENET_MII_TX_DATA0);GPIO_setPinConfig(GPIO_122_ENET_MII_TX_DATA1);GPIO_setPinConfig(GPIO_123_ENET_MII_TX_DATA2);GPIO_setPinConfig(GPIO_124_ENET_MII_TX_DATA3);////Use this only if the TX Error pin has to be connected//GPIO_setPinConfig(GPIO_46_ENET_MII_TX_ERR);//GPIO_setPinConfig(GPIO_118_ENET_MII_TX_EN);GPIO_setPinConfig(GPIO_114_ENET_MII_RX_DATA0);GPIO_setPinConfig(GPIO_115_ENET_MII_RX_DATA1);GPIO_setPinConfig(GPIO_116_ENET_MII_RX_DATA2);GPIO_setPinConfig(GPIO_117_ENET_MII_RX_DATA3);GPIO_setPinConfig(GPIO_113_ENET_MII_RX_ERR);GPIO_setPinConfig(GPIO_112_ENET_MII_RX_DV);GPIO_setPinConfig(GPIO_44_ENET_MII_TX_CLK);GPIO_setPinConfig(GPIO_111_ENET_MII_RX_CLK);////Power down pin to bring the external PHY out of Power down//GPIO_setDirectionMode(108, GPIO_DIR_MODE_OUT);GPIO_setPadConfig(108, GPIO_PIN_TYPE_PULLUP);GPIO_writePin(108,1);////PHY Reset Pin to be driven High to bring external PHY out of Reset//GPIO_setDirectionMode(119, GPIO_DIR_MODE_OUT);GPIO_setPadConfig(119, GPIO_PIN_TYPE_PULLUP);GPIO_writePin(119,1);
#endif#ifdef MCAN//// Setting the MCAN Clock.//SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_4);//// Configuring the GPIOs for MCAN.//GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
#endif#ifdef CANA//// Configuring the GPIOs for CAN A.//GPIO_setPinConfig(DEVICE_GPIO_CFG_CANRXA);GPIO_setPinConfig(DEVICE_GPIO_CFG_CANTXA);//// Allocate Shared Peripheral CAN A to the CM Side.//SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_CAN_A,0x1U);
#endif#ifdef CANB//// Configuring the GPIOs for CAN B.//GPIO_setPinConfig(DEVICE_GPIO_CFG_CANRXB);GPIO_setPinConfig(DEVICE_GPIO_CFG_CANTXB);//// Allocate Shared Peripheral CAN B to the CM Side.//SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_CAN_B,0x1U);
#endif#ifdef UART//// Configure GPIO85 as the UART Rx pin.//GPIO_setPinConfig(GPIO_85_UARTA_RX);GPIO_setDirectionMode(85, GPIO_DIR_MODE_IN);GPIO_setPadConfig(85, GPIO_PIN_TYPE_STD);GPIO_setQualificationMode(85, GPIO_QUAL_ASYNC);//// Configure GPIO84 as the UART Tx pin.//GPIO_setPinConfig(GPIO_84_UARTA_TX);GPIO_setDirectionMode(84, GPIO_DIR_MODE_OUT);GPIO_setPadConfig(84, GPIO_PIN_TYPE_STD);GPIO_setQualificationMode(84, GPIO_QUAL_ASYNC);
#endif#ifdef USB
#ifdef USE_20MHZ_XTAL//// Set up the auxiliary PLL so a 60 MHz output clock is provided to the USB module.// This fixed frequency is required for all USB operations.//SysCtl_setAuxClock(SYSCTL_AUXPLL_OSCSRC_XTAL |SYSCTL_AUXPLL_IMULT(48) |SYSCTL_REFDIV(2U) | SYSCTL_ODIV(4U) |SYSCTL_AUXPLL_DIV_2 |SYSCTL_AUXPLL_ENABLE |SYSCTL_DCC_BASE_0);
#else//// Set up the auxiliary PLL so a 60 MHz output clock is provided to the USB module.// This fixed frequency is required for all USB operations.//SysCtl_setAuxClock(SYSCTL_AUXPLL_OSCSRC_XTAL |SYSCTL_AUXPLL_IMULT(48) |SYSCTL_REFDIV(2U) | SYSCTL_ODIV(5U) |SYSCTL_AUXPLL_DIV_2 |SYSCTL_AUXPLL_ENABLE |SYSCTL_DCC_BASE_0);
#endif//// Allocate Shared Peripheral USB to the CM Side.//SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_USBA, 1);GPIO_setPinConfig(GPIO_0_GPIO0);GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);GPIO_setMasterCore(0, GPIO_CORE_CM);//// Set the master core of GPIOs to CM.//GPIO_setMasterCore(42, GPIO_CORE_CM);GPIO_setMasterCore(43, GPIO_CORE_CM);GPIO_setMasterCore(46, GPIO_CORE_CM);GPIO_setMasterCore(47, GPIO_CORE_CM);GPIO_setMasterCore(120, GPIO_CORE_CM);GPIO_setMasterCore(121, GPIO_CORE_CM);//// Set the USB DM and DP GPIOs.//GPIO_setAnalogMode(42, GPIO_ANALOG_ENABLED);GPIO_setAnalogMode(43, GPIO_ANALOG_ENABLED);//// Set the direction for VBUS and ID.//GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);GPIO_setDirectionMode(47, GPIO_DIR_MODE_IN);//// Configure the Power Fault.//GPIO_setMasterCore(120, GPIO_CORE_CM);GPIO_setDirectionMode(120, GPIO_DIR_MODE_IN);//// Configure the External Power Signal Enable.//GPIO_setMasterCore(121, GPIO_CORE_CM);GPIO_setDirectionMode(121, GPIO_DIR_MODE_OUT);GPIO_writePin(121, 1);//// Set the CM Clock to run at 120MHz.// The CM Clock is a fractional multiple of the AUXPLL Clock (120 Mhz) from// which the USB Clock (60 MHz) is derived.//SysCtl_setCMClk(SYSCTL_CMCLKOUT_DIV_1, SYSCTL_SOURCE_AUXPLL);
#endif
}

I2C的例程，cpu里面都没有设置GPIO，是不是I2C本身就有问题，当时测试都没过

,

Susan Yang：

我会在收到国外工程师回复后给您来回复该贴。