TI中文支持网刚学cc2541，谁能给出个配置pwm输出的代码，最好有注释，万分感激。
如：将一个管脚设置成pwm输出，可以更改占空比。
Yan：
Joney,
非常好的想法。
我也希望所有的问题都有一个回答的模板呢：）
PWM并不复杂，你只要照CC2541 的user guide去配置寄存器，并没你想象那么难：）
尝试一下吧：）
da qin zheng sheng：
9.1 16-Bit CounterThe timer consists of a 16-bit counter that increments or decrements at each active clock edge. Theperiod of the active clock edges is defined by the register bits, CLKCONCMD.TICKSPD, which set theglobal division of the system clock, giving a variable clock-tick frequency from 0.25 MHz to 32 MHz (giventhe use of the 32-MHz XOSC as clock source). This frequency is further divided in Timer 1 by theprescaler value set by T1CTL.DIV. This prescaler value can be 1, 8, 32, or 128. Thus, the lowest clockfrequency used by Timer 1 is 1953.125 Hz and the highest is 32 MHz when the 32 MHz XOSC is used assystem clock source. When the 16-MHz RCOSC is used as system clock source, then the highest clockfrequency used by Timer 1 is 16 MHz.The counter operates as a free-running counter, a modulo counter, or an up-and-down counter for use incenter-aligned PWM.It is possible to read the 16-bit counter value through the two 8-bit SFRs, T1CNTH and T1CNTL, containingthe high-order byte and low-order byte, respectively. When T1CNTL is read, the high-order byte of thecounter at that instant is buffered in T1CNTH so that the high-order byte can be read from T1CNTH. Thus,T1CNTL must always be read first, before reading T1CNTH.All write accesses to the T1CNTL register reset the 16-bit counter.The counter produces an interrupt request when the terminal count value (overflow) is reached. It ispossible to start and halt the counter with T1CTL control register settings. The counter is started when avalue other than 00 is written to T1CTL.MODE. If 00 is written to T1CTL.MODE, the counter halts at itspresent value.
da qin zheng sheng：
http://www.deyisupport.com/question_answer/wireless_connectivity/bluetooth/f/103/t/58384.aspx
