TI中文支持网DSP芯片：TMS320F28335
CCS v5.4版本
CMD文件的Page0和Page1是否可以重叠？
我在Page0中分配RAML1 : origin = 0x008400, length = 0x004000
在Page1中分配RAML4 : origin = 0x00C200, length = 0x001000
这两块区域不是有重叠的部分么？ 0x00C200-0x00C400部分？
为什么这部分重叠了以后编译器不会报错，且程序还可以跑？
谢谢！
——————————————————————————
CMD文件
/*
// TI File $Revision: /main/9 $
// Checkin $Date: August 28, 2007 11:23:31 $
//###########################################################################
//
// FILE: 28335_RAM_lnk.cmd
//
// TITLE: Linker Command File For 28335 examples that run out of RAM
//
// This ONLY includes all SARAM blocks on the 28335 device.
// This does not include flash or OTP.//
// Keep in mind that L0 and L1 are protected by the code
// security module.
//
// What this means is in most cases you will want to move to// another memory map file which has more memory defined.//
//###########################################################################
// $TI Release: DSP2833x Header Files V1.01 $
// $Release Date: September 26, 2007 $
//###########################################################################
*/
/* ======================================================
// For Code Composer Studio V2.2 and later
// —————————————
// In addition to this memory linker command file,// add the header linker command file directly to the project.// The header linker command file is required to link the
// peripheral structures to the proper locations within// the memory map.
//
// The header linker files are found in <base>\DSP2833x_Headers\cmd
//// For BIOS applications add: DSP2833x_Headers_BIOS.cmd
// For nonBIOS applications add: DSP2833x_Headers_nonBIOS.cmd========================================================= */
/* ======================================================
// For Code Composer Studio prior to V2.2
// ————————————–
// 1) Use one of the following -l statements to include the// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper// locations within the memory map */
/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2833x_Headers_nonBIOS.cmd */
/* Uncomment this line to include file only for BIOS applications */
/* -l DSP2833x_Headers_BIOS.cmd */
/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
library search path under project->build options, linker tab, library search path (-i).
/*========================================================= */
/* Define the memory block start/length for the F28335 PAGE 0 will be used to organize program sections
PAGE 1 will be used to organize data sections
Notes: Memory blocks on F28335 are uniform (ie same
physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be
defined for both PAGE 0 and PAGE 1.
Doing so will result in corruption of program and/or data. L0/L1/L2 and L3 memory blocks are mirrored – that is
they can be accessed in high memory or low memory.
For simplicity only one instance is used in this
linker file. Contiguous SARAM memory blocks can be combined if required to create a larger memory block.*/
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
/* BOOT_RSVD is used by the boot ROM for stack. */
/* This section is only reserved to keep the BOOT ROM from */
/* corrupting this area during the debug process */
BEGIN : origin = 0x000000, length = 0x000002 /* Boot to M0 will go here */
BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0
RAML0 : origin = 0x008000, length = 0x000400
RAML1 : origin = 0x008400, length = 0x004000/* RAML1 : origin = 0x009000, length = 0x001000 *//* RAML2 : origin = 0x00A000, length = 0x001000 *//* RAML3 : origin = 0x00B000, length = 0x001000 */
ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 – program space */ CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
ADC_CAL : origin = 0x380080, length = 0x000009
RESET : origin = 0x3FFFC0, length = 0x000002
IQTABLES : origin = 0x3FE000, length = 0x000b50
IQTABLES2 : origin = 0x3FEB50, length = 0x00008c
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0
BOOTROM : origin = 0x3FF27C, length = 0x000D44
PAGE 1 : RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML4 : origin = 0x00C200, length = 0x001000 RAML5 : origin = 0x00D200, length = 0x000E00 RAML6 : origin = 0x00E000, length = 0x001000 RAML7 : origin = 0x00F000, length = 0x001000 ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 – data space */ ZONE6 : origin = 0x100000, length = 0x000800 /* XINTF zone 6 – data space */ ZONE0 : origin = 0x004000, length = 0x000800 /* XINTF zone 0 – data space */}
SECTIONS
{
/* Setup for "boot to SARAM" mode: The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart : > BEGIN, PAGE = 0
ramfuncs : > RAML0, PAGE = 0 .text : > RAML1, PAGE = 0
.cinit : > RAML0, PAGE = 0
.pinit : > RAML0, PAGE = 0
.switch : > RAML0, PAGE = 0
.stack : > RAMM1, PAGE = 1
.ebss : > RAML4, PAGE = 1
.econst : > RAML5, PAGE = 1 .esysmem : > RAMM1, PAGE = 1
IQmath : > RAML0, PAGE = 0
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD DMARAML4 : > RAML4, PAGE = 1
DMARAML5 : > RAML5, PAGE = 1
DMARAML6 : > RAML6, PAGE = 1
DMARAML7 : > RAML7, PAGE = 1
MCtrl_VarFile : > RAML4, PAGE = 1
FPGA_VarFile : > RAML4, PAGE = 1
MCtrlPrmFile : > RAML4, PAGE = 1
ParkFile : > RAML4, PAGE = 1
PID_SpeedFile : > RAML4, PAGE = 1
PID_IFile : > RAML4, PAGE = 1
PID_IdFile : > RAML4, PAGE = 1
PID_IqFile : > RAML4, PAGE = 1
/* zlh_insert*/
PID_wrFile : > RAML4, PAGE = 1
PID_uwrFile : > RAML4, PAGE = 1
SMOParamFile : > RAML4, PAGE = 1
/*hzw_insert*/
PID_PhiFile :>RAML4, PAGE=1
/* hzw_insert*/
HzwFilterFile : > RAML5, PAGE = 1
FilterAFile : > RAML5, PAGE = 1
FilterBFile : > RAML5, PAGE = 1
FilterCFile : > RAML5, PAGE = 1
/* hzw insert*/
IqForAvgFile : > RAML6, PAGE = 1
ZONE7DATA : > ZONE7B, PAGE = 1 ZONE6DATA : > ZONE6, PAGE = 1 ZONE0DATA : > ZONE0, PAGE = 1
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used */
csm_rsvd : > CSM_RSVD PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
csmpasswds : > CSM_PWL PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
—————————————————————————————
.map文件
******************************************************************************
TMS320C2000 Linker PC v6.1.3******************************************************************************
>> Linked Mon Mar 31 10:06:14 2014
OUTPUT FILE NAME: <F:/MyFilesUpdate/CCS_workspace/P20140328DRFOC_CurrentModel/DSP2833x_motor/motor/motor/../../../DSP2833x_motor/motor/Debug/Motor.out>
ENTRY POINT SYMBOL: "code_start" address: 00000000
MEMORY CONFIGURATION
name origin length used unused attr fill
———————- ——– ——— ——– ——– —- ——–
PAGE 0:
BEGIN 00000000 00000002 00000002 00000000 RWIX
BOOT_RSVD 00000002 0000004e 00000000 0000004e RWIX
RAMM0 00000050 000003b0 00000000 000003b0 RWIX
RAML0 00008000 00000400 000001a7 00000259 RWIX
RAML1 00008400 00004000 00003e2b 000001d5 RWIX
ZONE7A 00200000 0000fc00 00000000 0000fc00 RWIX
CSM_RSVD 0033ff80 00000076 00000000 00000076 RWIX
CSM_PWL 0033fff8 00000008 00000000 00000008 RWIX
ADC_CAL 00380080 00000009 00000007 00000002 RWIX
IQTABLES 003fe000 00000b50 00000000 00000b50 RWIX
IQTABLES2 003feb50 0000008c 00000000 0000008c RWIX
FPUTABLES 003febdc 000006a0 00000000 000006a0 RWIX
BOOTROM 003ff27c 00000d44 00000000 00000d44 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
PAGE 1:
RAMM1 00000400 00000400 00000380 00000080 RWIX
DEV_EMU 00000880 00000180 000000d0 000000b0 RWIX
FLASH_REGS 00000a80 00000060 00000008 00000058 RWIX
CSM 00000ae0 00000010 00000010 00000000 RWIX
ADC_MIRROR 00000b00 00000010 00000010 00000000 RWIX
XINTF 00000b20 00000020 0000001e 00000002 RWIX
CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX
CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX
PIE_VECT 00000d00 00000100 00000100 00000000 RWIX
DMA 00001000 00000200 000000e0 00000120 RWIX
ZONE0 00004000 00000800 00000004 000007fc RWIX
MCBSPA 00005000 00000040 00000025 0000001b RWIX
MCBSPB 00005040 00000040 00000025 0000001b RWIX
ECANA 00006000 00000040 00000034 0000000c RWIX
ECANA_LAM 00006040 00000040 00000040 00000000 RWIX
ECANA_MOTS 00006080 00000040 00000040 00000000 RWIX
ECANA_MOTO 000060c0 00000040 00000040 00000000 RWIX
ECANA_MBOX 00006100 00000100 00000100 00000000 RWIX
ECANB 00006200 00000040 00000034 0000000c RWIX
ECANB_LAM 00006240 00000040 00000040 00000000 RWIX
ECANB_MOTS 00006280 00000040 00000040 00000000 RWIX
ECANB_MOTO 000062c0 00000040 00000040 00000000 RWIX
ECANB_MBOX 00006300 00000100 00000100 00000000 RWIX
EPWM1 00006800 00000022 00000022 00000000 RWIX
EPWM2 00006840 00000022 00000022 00000000 RWIX
EPWM3 00006880 00000022 00000022 00000000 RWIX
EPWM4 000068c0 00000022 00000022 00000000 RWIX
EPWM5 00006900 00000022 00000022 00000000 RWIX
EPWM6 00006940 00000022 00000022 00000000 RWIX
ECAP1 00006a00 00000020 00000020 00000000 RWIX
ECAP2 00006a20 00000020 00000020 00000000 RWIX
ECAP3 00006a40 00000020 00000020 00000000 RWIX
ECAP4 00006a60 00000020 00000020 00000000 RWIX
ECAP5 00006a80 00000020 00000020 00000000 RWIX
ECAP6 00006aa0 00000020 00000020 00000000 RWIX
EQEP1 00006b00 00000040 00000040 00000000 RWIX
EQEP2 00006b40 00000040 00000040 00000000 RWIX
GPIOCTRL 00006f80 00000040 0000002e 00000012 RWIX
GPIODAT 00006fc0 00000020 00000020 00000000 RWIX
GPIOINT 00006fe0 00000020 0000000a 00000016 RWIX
SYSTEM 00007010 00000020 00000020 00000000 RWIX
SPIA 00007040 00000010 00000010 00000000 RWIX
SCIA 00007050 00000010 00000010 00000000 RWIX
XINTRUPT 00007070 00000010 00000010 00000000 RWIX
ADC 00007100 00000020 0000001e 00000002 RWIX
SCIB 00007750 00000010 00000010 00000000 RWIX
SCIC 00007770 00000010 00000010 00000000 RWIX
I2CA 00007900 00000040 00000022 0000001e RWIX
RAML4 0000c200 00001000 000002b7 00000d49 RWIX
RAML5 0000d200 00000e00 00000196 00000c6a RWIX
RAML6 0000e000 00001000 0000032e 00000cd2 RWIX
RAML7 0000f000 00001000 00000000 00001000 RWIX
ZONE6 00100000 00000800 00000000 00000800 RWIX
ZONE7B 0020fc00 00000400 00000000 00000400 RWIX
CSM_PWL 0033fff8 00000008 00000008 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
——– —- ———- ———- —————-
codestart* 0 00000000 00000002 00000000 00000002 DSP2833x_CodeStartBranch.obj (codestart)
.pinit 0 00008000 00000000 UNINITIALIZED
.cinit 0 00008000 0000012c 00008000 00000062 DSP2833x_Xintf.obj (.cinit)
00008062 00000038 DSP2833x_Sci.obj (.cinit)
0000809a 00000022 DSP2833x_EPwm.obj (.cinit)
000080bc 00000020 Multiphase_motor.obj (.cinit)
000080dc 0000001d DSP2833x_ECan.obj (.cinit)
000080f9 0000000a rts2800_fpu32.lib : _lock.obj (.cinit)
00008103 0000000a : exit.obj (.cinit)
0000810d 00000009 DSP2833x_EQep.obj (.cinit)
00008116 00000008 DSP2833x_CpuTimers.obj (.cinit)
0000811e 00000004 DSP2833x_DMA.obj (.cinit)
00008122 00000004 DSP2833x_ECap.obj (.cinit)
00008126 00000004 rts2800_fpu32.lib : errno.obj (.cinit)
0000812a 00000002 –HOLE– [fill = 0]
.switch 0 0000812c 0000005c 0000812c 0000005c Prm_Init_yjq.obj (.switch:_Param_Check)
ramfuncs 0 00008188 0000001f 00008188 0000001b DSP2833x_SysCtrl.obj (ramfuncs)
000081a3 00000004 DSP2833x_usDelay.obj (ramfuncs)
.text 0 00008400 00003e2b 00008400 00000ed8 Prm_Init_yjq.obj (.text)
000092d8 000007b4 DSP2833x_Xintf.obj (.text:retain)
00009a8c 000004ff DSP2833x_Xintf.obj (.text)
00009f8b 000004ae DSP2833x_EPwm.obj (.text:retain)
0000a439 0000043b Multiphase_motor.obj (.text)
0000a874 00000439 DSP2833x_DMA.obj (.text)
0000acad 00000323 DSP2833x_DefaultIsr.obj (.text:retain)
0000afd0 00000258 DSP2833x_ECan.obj (.text)
0000b228 00000221 DSP2833x_I2C.obj (.text)
0000b449 000001e2 DSP2833x_Mcbsp.obj (.text)
0000b62b 000001ac DSP2833x_EPwm.obj (.text)
0000b7d7 000000fb DSP2833x_Sci.obj (.text)
0000b8d2 000000f3 DSP2833x_SysCtrl.obj (.text)
0000b9c5 000000df DSP2833x_Spi.obj (.text)
0000baa4 000000b5 DSP2833x_FPGA.obj (.text)
0000bb59 000000ae DSP2833x_Gpio.obj (.text)
0000bc07 00000096 DSP2833x_CpuTimers.obj (.text)
0000bc9d 00000088 rts2800_fpu32.lib : fs_div.obj (.text)
0000bd25 0000007d DSP2833x_EQep.obj (.text:retain)
0000bda2 0000006a rts2800_fpu32.lib : exp.obj (.text)
0000be0c 00000061 : cos.obj (.text)
0000be6d 0000005a : pow.obj (.text)
0000bec7 00000057 : sin.obj (.text)
0000bf1e 00000054 : _log.obj (.text)
0000bf72 00000048 DSP2833x_EQep.obj (.text)
0000bfba 00000047 DSP2833x_Adc.obj (.text)
0000c001 00000046 rts2800_fpu32.lib : boot.obj (.text)
0000c047 00000041 DSP2833x_ECap.obj (.text)
0000c088 00000035 rts2800_fpu32.lib : ldexp.obj (.text)
0000c0bd 00000030 DSP2833x_CpuTimers.obj (.text:retain)
0000c0ed 00000028 DSP2833x_PieCtrl.obj (.text)
0000c115 00000027 DSP2833x_ECap.obj (.text:retain)
0000c13c 00000023 rts2800_fpu32.lib : sqrt.obj (.text)
0000c15f 00000022 : i_div.obj (.text)
0000c181 00000020 DSP2833x_PieVect.obj (.text)
0000c1a1 0000001c DSP2833x_DMA.obj (.text:retain)
0000c1bd 00000019 rts2800_fpu32.lib : args_main.obj (.text)
0000c1d6 00000019 : exit.obj (.text)
0000c1ef 00000016 : frexp.obj (.text)
0000c205 00000015 DSP2833x_MemCopy.obj (.text)
0000c21a 00000009 rts2800_fpu32.lib : _lock.obj (.text)
0000c223 00000008 DSP2833x_CodeStartBranch.obj (.text)
csm_rsvd 0 0033ff80 00000000 DSECT
csmpasswds* 0 0033fff8 00000000 DSECT
.adc_cal 0 00380080 00000007 NOLOAD SECTION
00380080 00000007 DSP2833x_ADC_cal.obj (.adc_cal)
.reset 0 003fffc0 00000002 DSECT
003fffc0 00000002 rts2800_fpu32.lib : boot.obj (.reset)
.stack 1 00000400 00000380 UNINITIALIZED
00000400 00000380 –HOLE–
DevEmuRegsFile* 1 00000880 000000d0 UNINITIALIZED
00000880 000000d0 DSP2833x_GlobalVariableDefs.obj (DevEmuRegsFile)
FlashRegsFile* 1 00000a80 00000008 UNINITIALIZED
00000a80 00000008 DSP2833x_GlobalVariableDefs.obj (FlashRegsFile)
CsmRegsFile* 1 00000ae0 00000010 UNINITIALIZED
00000ae0 00000010 DSP2833x_GlobalVariableDefs.obj (CsmRegsFile)
AdcMirrorFile* 1 00000b00 00000010 UNINITIALIZED
00000b00 00000010 DSP2833x_GlobalVariableDefs.obj (AdcMirrorFile)
XintfRegsFile* 1 00000b20 0000001e UNINITIALIZED
00000b20 0000001e DSP2833x_GlobalVariableDefs.obj (XintfRegsFile)
CpuTimer0RegsFile* 1 00000c00 00000008 UNINITIALIZED
00000c00 00000008 DSP2833x_GlobalVariableDefs.obj (CpuTimer0RegsFile)
CpuTimer1RegsFile* 1 00000c08 00000008 UNINITIALIZED
00000c08 00000008 DSP2833x_GlobalVariableDefs.obj (CpuTimer1RegsFile)
CpuTimer2RegsFile* 1 00000c10 00000008 UNINITIALIZED
00000c10 00000008 DSP2833x_GlobalVariableDefs.obj (CpuTimer2RegsFile)
PieCtrlRegsFile* 1 00000ce0 0000001a UNINITIALIZED
00000ce0 0000001a DSP2833x_GlobalVariableDefs.obj (PieCtrlRegsFile)
PieVectTableFile* 1 00000d00 00000100 UNINITIALIZED
00000d00 00000100 DSP2833x_GlobalVariableDefs.obj (PieVectTableFile)
DmaRegsFile* 1 00001000 000000e0 UNINITIALIZED
00001000 000000e0 DSP2833x_GlobalVariableDefs.obj (DmaRegsFile)
ZONE0DATA* 1 00004000 00000004 UNINITIALIZED
00004000 00000004 DSP2833x_DMA.obj (ZONE0DATA)
McbspaRegsFile* 1 00005000 00000025 UNINITIALIZED
00005000 00000025 DSP2833x_GlobalVariableDefs.obj (McbspaRegsFile)
McbspbRegsFile* 1 00005040 00000025 UNINITIALIZED
00005040 00000025 DSP2833x_GlobalVariableDefs.obj (McbspbRegsFile)
ECanaRegsFile* 1 00006000 00000034 UNINITIALIZED
00006000 00000034 DSP2833x_GlobalVariableDefs.obj (ECanaRegsFile)
ECanaLAMRegsFile* 1 00006040 00000040 UNINITIALIZED
00006040 00000040 DSP2833x_GlobalVariableDefs.obj (ECanaLAMRegsFile)
ECanaMOTSRegsFile* 1 00006080 00000040 UNINITIALIZED
00006080 00000040 DSP2833x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)
ECanaMOTORegsFile* 1 000060c0 00000040 UNINITIALIZED
000060c0 00000040 DSP2833x_GlobalVariableDefs.obj (ECanaMOTORegsFile)
ECanaMboxesFile* 1 00006100 00000100 UNINITIALIZED
00006100 00000100 DSP2833x_GlobalVariableDefs.obj (ECanaMboxesFile)
ECanbRegsFile* 1 00006200 00000034 UNINITIALIZED
00006200 00000034 DSP2833x_GlobalVariableDefs.obj (ECanbRegsFile)
ECanbLAMRegsFile* 1 00006240 00000040 UNINITIALIZED
00006240 00000040 DSP2833x_GlobalVariableDefs.obj (ECanbLAMRegsFile)
ECanbMOTSRegsFile* 1 00006280 00000040 UNINITIALIZED
00006280 00000040 DSP2833x_GlobalVariableDefs.obj (ECanbMOTSRegsFile)
ECanbMOTORegsFile* 1 000062c0 00000040 UNINITIALIZED
000062c0 00000040 DSP2833x_GlobalVariableDefs.obj (ECanbMOTORegsFile)
ECanbMboxesFile* 1 00006300 00000100 UNINITIALIZED
00006300 00000100 DSP2833x_GlobalVariableDefs.obj (ECanbMboxesFile)
EPwm1RegsFile* 1 00006800 00000022 UNINITIALIZED
00006800 00000022 DSP2833x_GlobalVariableDefs.obj (EPwm1RegsFile)
EPwm2RegsFile* 1 00006840 00000022 UNINITIALIZED
00006840 00000022 DSP2833x_GlobalVariableDefs.obj (EPwm2RegsFile)
EPwm3RegsFile* 1 00006880 00000022 UNINITIALIZED
00006880 00000022 DSP2833x_GlobalVariableDefs.obj (EPwm3RegsFile)
EPwm4RegsFile* 1 000068c0 00000022 UNINITIALIZED
000068c0 00000022 DSP2833x_GlobalVariableDefs.obj (EPwm4RegsFile)
EPwm5RegsFile* 1 00006900 00000022 UNINITIALIZED
00006900 00000022 DSP2833x_GlobalVariableDefs.obj (EPwm5RegsFile)
EPwm6RegsFile* 1 00006940 00000022 UNINITIALIZED
00006940 00000022 DSP2833x_GlobalVariableDefs.obj (EPwm6RegsFile)
ECap1RegsFile* 1 00006a00 00000020 UNINITIALIZED
00006a00 00000020 DSP2833x_GlobalVariableDefs.obj (ECap1RegsFile)
ECap2RegsFile* 1 00006a20 00000020 UNINITIALIZED
00006a20 00000020 DSP2833x_GlobalVariableDefs.obj (ECap2RegsFile)
ECap3RegsFile* 1 00006a40 00000020 UNINITIALIZED
00006a40 00000020 DSP2833x_GlobalVariableDefs.obj (ECap3RegsFile)
ECap4RegsFile* 1 00006a60 00000020 UNINITIALIZED
00006a60 00000020 DSP2833x_GlobalVariableDefs.obj (ECap4RegsFile)
ECap5RegsFile* 1 00006a80 00000020 UNINITIALIZED
00006a80 00000020 DSP2833x_GlobalVariableDefs.obj (ECap5RegsFile)
ECap6RegsFile* 1 00006aa0 00000020 UNINITIALIZED
00006aa0 00000020 DSP2833x_GlobalVariableDefs.obj (ECap6RegsFile)
EQep1RegsFile* 1 00006b00 00000040 UNINITIALIZED
00006b00 00000040 DSP2833x_GlobalVariableDefs.obj (EQep1RegsFile)
EQep2RegsFile* 1 00006b40 00000040 UNINITIALIZED
00006b40 00000040 DSP2833x_GlobalVariableDefs.obj (EQep2RegsFile)
GpioCtrlRegsFile* 1 00006f80 0000002e UNINITIALIZED
00006f80 0000002e DSP2833x_GlobalVariableDefs.obj (GpioCtrlRegsFile)
GpioDataRegsFile* 1 00006fc0 00000020 UNINITIALIZED
00006fc0 00000020 DSP2833x_GlobalVariableDefs.obj (GpioDataRegsFile)
GpioIntRegsFile* 1 00006fe0 0000000a UNINITIALIZED
00006fe0 0000000a DSP2833x_GlobalVariableDefs.obj (GpioIntRegsFile)
SysCtrlRegsFile* 1 00007010 00000020 UNINITIALIZED
00007010 00000020 DSP2833x_GlobalVariableDefs.obj (SysCtrlRegsFile)
SpiaRegsFile* 1 00007040 00000010 UNINITIALIZED
00007040 00000010 DSP2833x_GlobalVariableDefs.obj (SpiaRegsFile)
SciaRegsFile* 1 00007050 00000010 UNINITIALIZED
00007050 00000010 DSP2833x_GlobalVariableDefs.obj (SciaRegsFile)
XIntruptRegsFile* 1 00007070 00000010 UNINITIALIZED
00007070 00000010 DSP2833x_GlobalVariableDefs.obj (XIntruptRegsFile)
AdcRegsFile* 1 00007100 0000001e UNINITIALIZED
00007100 0000001e DSP2833x_GlobalVariableDefs.obj (AdcRegsFile)
ScibRegsFile* 1 00007750 00000010 UNINITIALIZED
00007750 00000010 DSP2833x_GlobalVariableDefs.obj (ScibRegsFile)
ScicRegsFile* 1 00007770 00000010 UNINITIALIZED
00007770 00000010 DSP2833x_GlobalVariableDefs.obj (ScicRegsFile)
I2caRegsFile* 1 00007900 00000022 UNINITIALIZED
00007900 00000022 DSP2833x_GlobalVariableDefs.obj (I2caRegsFile)
.ebss 1 0000c200 000000e2 UNINITIALIZED
0000c200 00000040 DSP2833x_Xintf.obj (.ebss)
0000c240 00000036 DSP2833x_I2C.obj (.ebss)
0000c276 0000000a DSP2833x_EPwm.obj (.ebss)
0000c280 0000001a DSP2833x_CpuTimers.obj (.ebss)
0000c29a 0000000e DSP2833x_Sci.obj (.ebss)
0000c2a8 0000000c DSP2833x_ECan.obj (.ebss)
0000c2b4 0000000c Multiphase_motor.obj (.ebss)
0000c2c0 00000006 DSP2833x_DMA.obj (.ebss)
0000c2c6 00000006 DSP2833x_ECap.obj (.ebss)
0000c2cc 00000005 DSP2833x_Mcbsp.obj (.ebss)
0000c2d1 00000001 rts2800_fpu32.lib : errno.obj (.ebss)
0000c2d2 00000004 DSP2833x_EQep.obj (.ebss)
0000c2d6 00000004 Prm_Init_yjq.obj (.ebss)
0000c2da 00000004 rts2800_fpu32.lib : _lock.obj (.ebss)
0000c2de 00000004 : exit.obj (.ebss)
PID_IFile* 1 0000c2e2 0000000e UNINITIALIZED
0000c2e2 0000000e DSP2833x_GlobalVariableDefs.obj (PID_IFile)
PID_IdFile* 1 0000c2f0 0000000e UNINITIALIZED
0000c2f0 0000000e DSP2833x_GlobalVariableDefs.obj (PID_IdFile)
MCtrl_VarFile* 1 0000c300 000000b6 UNINITIALIZED
0000c300 000000b6 DSP2833x_GlobalVariableDefs.obj (MCtrl_VarFile)
FPGA_VarFile* 1 0000c3b6 0000000a UNINITIALIZED
0000c3b6 0000000a DSP2833x_GlobalVariableDefs.obj (FPGA_VarFile)
SMOParamFile* 1 0000c3c0 00000078 UNINITIALIZED
0000c3c0 00000078 DSP2833x_GlobalVariableDefs.obj (SMOParamFile)
MCtrlPrmFile* 1 0000c440 0000002f UNINITIALIZED
0000c440 0000002f DSP2833x_GlobalVariableDefs.obj (MCtrlPrmFile)
PID_IqFile* 1 0000c470 0000000e UNINITIALIZED
0000c470 0000000e DSP2833x_GlobalVariableDefs.obj (PID_IqFile)
PID_PhiFile* 1 0000c480 0000000e UNINITIALIZED
0000c480 0000000e DSP2833x_GlobalVariableDefs.obj (PID_PhiFile)
PID_SpeedFile* 1 0000c48e 0000000e UNINITIALIZED
0000c48e 0000000e DSP2833x_GlobalVariableDefs.obj (PID_SpeedFile)
PID_uwrFile* 1 0000c49c 0000000e UNINITIALIZED
0000c49c 0000000e DSP2833x_GlobalVariableDefs.obj (PID_uwrFile)
PID_wrFile* 1 0000c4aa 0000000e UNINITIALIZED
0000c4aa 0000000e DSP2833x_GlobalVariableDefs.obj (PID_wrFile)
ParkFile 1 0000c4c0 0000000c UNINITIALIZED
0000c4c0 0000000c DSP2833x_GlobalVariableDefs.obj (ParkFile)
.econst 1 0000d200 00000100 0000d200 00000100 DSP2833x_PieVect.obj (.econst)
FilterAFile* 1 0000d300 0000002a UNINITIALIZED
0000d300 0000002a DSP2833x_GlobalVariableDefs.obj (FilterAFile)
FilterBFile* 1 0000d340 0000002a UNINITIALIZED
0000d340 0000002a DSP2833x_GlobalVariableDefs.obj (FilterBFile)
FilterCFile* 1 0000d380 0000002a UNINITIALIZED
0000d380 0000002a DSP2833x_GlobalVariableDefs.obj (FilterCFile)
HzwFilterFile* 1 0000d3c0 00000018 UNINITIALIZED
0000d3c0 00000018 DSP2833x_GlobalVariableDefs.obj (HzwFilterFile)
IqForAvgFile* 1 0000e000 0000032e UNINITIALIZED
0000e000 0000032e DSP2833x_GlobalVariableDefs.obj (IqForAvgFile)
CsmPwlFile* 1 0033fff8 00000008 UNINITIALIZED
0033fff8 00000008 DSP2833x_GlobalVariableDefs.obj (CsmPwlFile)
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
——– —-
00008400 .text
0000c1d6 C$$EXIT
0000bc9d FS$$DIV
0000c15f I$$DIV
0000c170 I$$MOD
0000ad93 _ADCINT_ISR
00380080 _ADC_cal
00000b00 _AdcMirror
00007100 _AdcRegs
00009c17 _AvgCal
0000c2d9 _BrgSetVl
0000aff9 _CAN_RX
0000afd0 _CAN_TX
0000908d _Cal_Cvf0
000090a0 _Cal_Cvf1
00008fc1 _Cal_DDFJog
00009027 _Cal_DDFNxt
00008fe3 _Cal_DIFJog
00009058 _Cal_DIFNxt
00009005 _Cal_GvnDelta
00009168 _Cal_Lvalfa
0000912c _Cal_PID
000090fe _Cal_RP24
00009115 _Cal_RP37
000090d0 _Cal_RP42
000090e7 _Cal_RP43
000090b9 _Cal_Vmin
0000b8ac _Check_Com
0000bc64 _ConfigCpuTimer
0000c28a _CpuTimer0
00000c00 _CpuTimer0Regs
0000c282 _CpuTimer1
00000c08 _CpuTimer1Regs
0000c292 _CpuTimer2
00000c10 _CpuTimer2Regs
0033fff8 _CsmPwl
00000ae0 _CsmRegs
0000b994 _CsmUnlock
0000acc1 _DATALOG_ISR
0000aeb5 _DINTCH1_ISR
0000aebf _DINTCH2_ISR
0000aec9 _DINTCH3_ISR
0000aed3 _DINTCH4_ISR
0000aedd _DINTCH5_ISR
0000aee7 _DINTCH6_ISR
0000a8b8 _DMACH1AddrConfig
0000a8ca _DMACH1BurstConfig
0000a8fe _DMACH1ModeConfig
0000a8da _DMACH1TransferConfig
0000a8ea _DMACH1WrapConfig
0000a964 _DMACH2AddrConfig
0000a976 _DMACH2BurstConfig
0000a9aa _DMACH2ModeConfig
0000a986 _DMACH2TransferConfig
0000a996 _DMACH2WrapConfig
0000aa0c _DMACH3AddrConfig
0000aa1e _DMACH3BurstConfig
0000aa52 _DMACH3ModeConfig
0000aa2e _DMACH3TransferConfig
0000aa3e _DMACH3WrapConfig
0000aab4 _DMACH4AddrConfig
0000aac6 _DMACH4BurstConfig
0000aafa _DMACH4ModeConfig
0000aad6 _DMACH4TransferConfig
0000aae6 _DMACH4WrapConfig
0000ab5c _DMACH5AddrConfig
0000ab6e _DMACH5BurstConfig
0000aba2 _DMACH5ModeConfig
0000ab7e _DMACH5TransferConfig
0000ab8e _DMACH5WrapConfig
0000ac04 _DMACH6AddrConfig
0000ac16 _DMACH6BurstConfig
0000ac4b _DMACH6ModeConfig
0000ac27 _DMACH6TransferConfig
0000ac37 _DMACH6WrapConfig
0000a874 _DMAInitialize
000081a3 _DSP28x_usDelay
0000b424 _DSPRd_E2ROM
0000b2b6 _DSPReadE2ROM
0000b254 _DSPWriteE2ROM
0000c2b0 _DSP_RXH
0000c2b2 _DSP_RXL
0000b7d7 _DSP_scib
0000b7f6 _DSP_scic
00000880 _DevEmuRegs
0000b8e5 _DisableDog
00001000 _DmaRegs
0000af41 _ECAN0INTA_ISR
0000af55 _ECAN0INTB_ISR
0000af4b _ECAN1INTA_ISR
0000af5f _ECAN1INTB_ISR
0000ae29 _ECAP1_INT_ISR
0000ae33 _ECAP2_INT_ISR
0000ae3d _ECAP3_INT_ISR
0000ae47 _ECAP4_INT_ISR
0000ae51 _ECAP5_INT_ISR
0000ae5b _ECAP6_INT_ISR
00006040 _ECanaLAMRegs
000060c0 _ECanaMOTORegs
00006080 _ECanaMOTSRegs
00006100 _ECanaMboxes
00006000 _ECanaRegs
00006240 _ECanbLAMRegs
000062c0 _ECanbMOTORegs
00006280 _ECanbMOTSRegs
00006300 _ECanbMboxes
00006200 _ECanbRegs
00006a00 _ECap1Regs
00006a20 _ECap2Regs
00006a40 _ECap3Regs
00006a60 _ECap4Regs
00006a80 _ECap5Regs
00006aa0 _ECap6Regs
0000afaf _EMPTY_ISR
0000acd5 _EMUINT_ISR
0000aded _EPWM1_INT_ISR
0000adb1 _EPWM1_TZINT_ISR
0000adf7 _EPWM2_INT_ISR
0000adbb _EPWM2_TZINT_ISR
0000ae01 _EPWM3_INT_ISR
0000adc5 _EPWM3_TZINT_ISR
0000ae0b _EPWM4_INT_ISR
0000adcf _EPWM4_TZINT_ISR
0000ae15 _EPWM5_INT_ISR
0000add9 _EPWM5_TZINT_ISR
0000ae1f _EPWM6_INT_ISR
0000ade3 _EPWM6_TZINT_ISR
00006800 _EPwm1Regs
00006840 _EPwm2Regs
00006880 _EPwm3Regs
000068c0 _EPwm4Regs
00006900 _EPwm5Regs
00006940 _EPwm6Regs
0000ae65 _EQEP1_INT_ISR
0000ae6f _EQEP2_INT_ISR
00006b00 _EQep1Regs
00006b40 _EQep2Regs
0000c10c _EnableInterrupts
0000c29c _ErrorCount
0000c2a0 _ErrorCount1
0000c2a7 _ErrorCount2
0000b378 _FIFOread
0000b318 _FIFOwrite
00004000 _FPGADMABuf
0000c2c2 _FPGADMADest
0000c2c4 _FPGADMASource
0000baa4 _FPGA_CONFIG
0000bb18 _FPGA_CUT
0000c3b6 _FPGA_Var
00009ef8 _FPGA_checkstate
0000c2c8 _FP_INT_PRD
0000c2ca _FP_INT_PRD1
0000d300 _FilterA
0000d340 _FilterB
0000d380 _FilterC
00009b6e _FilterCal
0000a4e1 _FlashMemCopy
00000a80 _FlashRegs
00006f80 _GpioCtrlRegs
00006fc0 _GpioDataRegs
00006fe0 _GpioIntRegs
00009a8c _Hzw_DAab_Zoom
00009abb _Hzw_DAcd_Zoom
00009ae7 _Hzw_Filter_Phir
0000aef1 _I2CINT1A_ISR
0000aefb _I2CINT2A_ISR
0000c2b4 _I2Ctemp
00007900 _I2caRegs
0000a4e2 _IGBT_check
0000ace9 _ILLEGAL_ISR
0000acad _INT13_ISR
0000acb7 _INT14_ISR
0000c2d6 _Id
0000c205 _Id1
0000c21c _Id_err
0000c220 _Id_fed
0000c226 _Id_giv
0000c276 _Idd
0000c20e _Ilim
0000c222 _Im
0000c212 _Imin
0000bfba _InitAdc
0000a84e _InitAvgParam
0000bc07 _InitCpuTimers
0000b02b _InitECan
0000b20f _InitECanGpio
0000b030 _InitECana
0000b212 _InitECanaGpio
0000c047 _InitECap
0000c07c _InitECap1Gpio
0000c079 _InitECapGpio
0000b62b _InitEPwm
0000b633 _InitEPwm1Gpio
0000b637 _InitEPwm2Gpio
0000b649 _InitEPwm3Gpio
0000b62c _InitEPwmGpio
0000b65d _InitEPwmSyncGpio
0000b6a7 _InitEPwmTimer
0000bf72 _InitEQep
0000bf9b _InitEQep1Gpio
0000bf98 _InitEQepGpio
0000a6ce _InitFilterParam
00008188 _InitFlash
0000bb59 _InitGpio
0000b228 _InitI2C
0000b23e _InitI2CGpio
0000b449 _InitMcbsp
0000b53c _InitMcbspGpio
0000b44e _InitMcbspa
0000b4c7 _InitMcbspa12bit
0000b4d2 _InitMcbspa16bit
0000b4dd _InitMcbspa20bit
0000b4e8 _InitMcbspa24bit
0000b4f3 _InitMcbspa32bit
0000b4c0 _InitMcbspa8bit
0000b53f _InitMcbspaGpio
0000b47a _InitMcbspb
0000b505 _InitMcbspb12bit
0000b510 _InitMcbspb16bit
0000b51b _InitMcbspb20bit
0000b526 _InitMcbspb24bit
0000b531 _InitMcbspb32bit
0000b4fe _InitMcbspb8bit
0000b572 _InitMcbspbGpio
0000b939 _InitPeripheralClocks
0000c0ed _InitPieCtrl
0000c181 _InitPieVectTable
0000b8ed _InitPll
0000b80e _InitSci
0000b817 _InitScibGpio
0000b82b _InitScicGpio
0000b9c5 _InitSpi
0000ba86 _InitSpiaGpio
0000b8d2 _InitSysCtrl
0000b671 _InitTzGpio
00009dd6 _InitXintf
00009e72 _InitXintf16Gpio
00009e2b _InitXintf32Gpio
0000a67f _Init_HzwFilter
0000a554 _Init_MCtrlPrm
00008676 _Init_Mctrl_Var
0000a5b0 _Init_SMOPrm
0000c2d8 _Iq
0000c203 _Iq1
0000e000 _IqForAvg
0000c21a _Iq_err
0000c21e _Iq_fed
0000c224 _Iq_giv
0000c277 _Iqq
0000afa5 _LUF_ISR
0000af9b _LVF_ISR
0000c2a5 _LoopCount
0000c29b _LoopCount1
0000c2a4 _LoopCount2
0000c440 _MCtrlPrm
0000c300 _MCtrl_Var
0000aea1 _MRINTA_ISR
0000ae8d _MRINTB_ISR
0000aeab _MXINTA_ISR
0000ae97 _MXINTB_ISR
00005000 _McbspaRegs
00005040 _McbspbRegs
0000c205 _MemCopy
0000acdf _NMI_ISR
000091ba _Opr_Loop
00008de9 _Opr_Mde_Ctrl
0000b72c _PIDCalc
0000c2e2 _PID_I
0000c2f0 _PID_Id
0000c470 _PID_Iq
0000c480 _PID_Phi
0000c48e _PID_Speed
0000c49c _PID_uwr
0000c4aa _PID_wr
0000afbc _PIE_RESERVED
00008400 _Param_Check
0000c4c0 _Park
00000ce0 _PieCtrlRegs
00000d00 _PieVectTable
0000d200 _PieVectTableInit
00008eb5 _Protect
000088f1 _RE_Order
0000accb _RTOSINT_ISR
0000c29a _ReceivedChar
0000c29e _ReceivedChar1
0000c2a1 _ReceivedChar2
00008785 _Reset_Mctrl_Var
0000af19 _SCIRXINTA_ISR
0000af2d _SCIRXINTB_ISR
0000af05 _SCIRXINTC_ISR
0000af23 _SCITXINTA_ISR
0000af37 _SCITXINTB_ISR
0000af0f _SCITXINTC_ISR
0000ad6b _SEQ1INT_ISR
0000ad75 _SEQ2INT_ISR
0000ae79 _SPIRXINTA_ISR
0000ae83 _SPITXINTA_ISR
00007050 _SciaRegs
00007750 _ScibRegs
00007770 _ScicRegs
0000c29f _SendChar
0000c29d _SendChar1
0000c2a2 _SendChar2
0000c2d7 _SensorNo
00009216 _Sensor_Check
0000b8db _ServiceDog
00007040 _SpiaRegs
0000a95c _StartDMACH1
0000aa04 _StartDMACH2
0000aaac _StartDMACH3
0000ab54 _StartDMACH4
0000abfc _StartDMACH5
0000aca5 _StartDMACH6
0000919e _Stop_Drv
00007010 _SysCtrlRegs
0000ad9d _TINT0_ISR
0000c2ae _TestMbox1
0000c2aa _TestMbox2
0000c2ac _TestMbox3
0000ad4d _USER10_ISR
0000ad57 _USER11_ISR
0000ad61 _USER12_ISR
0000acf3 _USER1_ISR
0000acfd _USER2_ISR
0000ad07 _USER3_ISR
0000ad11 _USER4_ISR
0000ad1b _USER5_ISR
0000ad25 _USER6_ISR
0000ad2f _USER7_ISR
0000ad39 _USER8_ISR
0000ad43 _USER9_ISR
0000c214 _Valfa
0000c216 _Vbeta
0000c238 _Vd
0000c201 _Vd1
0000c218 _Vq
0000c204 _Vq1
0000ada7 _WAKEINT_ISR
0000ad7f _XINT1_ISR
0000ad89 _XINT2_ISR
0000af69 _XINT3_ISR
0000af73 _XINT4_ISR
0000af7d _XINT5_ISR
0000af87 _XINT6_ISR
0000af91 _XINT7_ISR
00007070 _XIntruptRegs
00000b20 _XintfRegs
00009ec4 _Xintset
00000780 __STACK_END
00000380 __STACK_SIZE
00000001 __TI_args_main
ffffffff ___binit__
ffffffff ___c_args__
00008000 ___cinit__
0000c22b ___etext__
ffffffff ___pinit__
00008400 ___text__
0000c1bd __args_main
0000c2de __cleanup_ptr
0000c2e0 __dtors_ptr
0000c2dc __lock
0000bf1e __log
0000c222 __nop
0000c21e __register_lock
0000c21a __register_unlock
00000400 __stack
0000c2da __unlock
0000c1d6 _abort
0000c2be _adc
0000c2cd _adc_ch
0000c2cc _adc_rdata
0000c2ce _adc_rdata1
0000c2d0 _adcdata
0000c27a _adchtmp
0000c2cf _adchz
0000c27b _adcread
0000c279 _adcread1
0000c278 _adcrtry
0000c001 _c_int00
0000b5bc _clkg_delay_40CLK
0000b5a6 _clkg_delay_loop
0000be0c _cos
0000b418 _delay_US
0000b590 _delay_loop
0000c115 _ecap1int_isr
00009f8b _epwm1_timer_isr
0000a0af _epwm2_timer_isr
00009fa0 _epwm3_timer_isr
0000a420 _epwm4_timer_isr
0000bd25 _eqep1int_isr
0000c2d1 _errno
0000917f _error_warning
0000c1d8 _exit
0000bda2 _exp
0000c1ef _frexp
0000b78d _husat
0000d3c0 _hzw_filter_param
0000c240 _i2ctmp
0000c206 _itemp
0000c208 _itemp0
0000c2ba _j
0000c088 _ldexp
0000c1a1 _local_DINTCH1_ISR
0000b00f _mailbox_read
0000a439 _main
0000c2d4 _moterspeed
0000c234 _mytemp
0000c22a _mytheta
0000be6d _pow
0000afc6 _rsvd_ISR
0000b879 _scia_xmitb
0000b841 _scib_init
0000b88b _scib_xmit
0000b882 _scib_xmitb
0000b85e _scic_init
0000b8a0 _scic_xmit
0000b897 _scic_xmitb
0000c2bb _send_addr
0000c2b5 _send_num
0000bec7 _sin
0000ba00 _spiDAC_a
0000ba20 _spiDAC_b
0000ba42 _spiDAC_c
0000ba64 _spiDAC_d
0000b5d2 _spi_adc
0000c2b8 _spisdata
0000c2b9 _spitemp
0000c13c _sqrt
0000bb4c _start_time1
0000bb51 _stop_time1
0000c27e _temp
0000c27c _temp1
0000c0bd _time0int_isr
0000c0d5 _time1int_isr
0000c23e _tmp1
0000c232 _tmp2
0000b3f1 _wait_hundred_ms
0000b40b _wait_one_ms
0000b3e4 _wait_one_second
0000b3fe _wait_ten_ms
000092d8 _xint1_isr
0000c2c0 _yjqDMA
0000c2c6 _yjqECAP1
0000c281 _yjqTIME0
0000c280 _yjqTIME1
0000c2a8 _yjqcan
0000c2d2 _yjqeqep1
0000c2bc _yjqflash
0000c2b6 _yjqi
0000c2b7 _yjqi1
0000c2a6 _yjqsci
0000c2a3 _yjqsci1
0000c200 _zflag
0000c210 _ziq
0000c3c0 _zsmo
ffffffff binit
00008000 cinit
00000000 code_start
0000c22b etext
ffffffff pinit
GLOBAL SYMBOLS: SORTED BY Symbol Address
address name
——– —-
00000000 code_start
00000001 __TI_args_main
00000380 __STACK_SIZE
00000400 __stack
00000780 __STACK_END
00000880 _DevEmuRegs
00000a80 _FlashRegs
00000ae0 _CsmRegs
00000b00 _AdcMirror
00000b20 _XintfRegs
00000c00 _CpuTimer0Regs
00000c08 _CpuTimer1Regs
00000c10 _CpuTimer2Regs
00000ce0 _PieCtrlRegs
00000d00 _PieVectTable
00001000 _DmaRegs
00004000 _FPGADMABuf
00005000 _McbspaRegs
00005040 _McbspbRegs
00006000 _ECanaRegs
00006040 _ECanaLAMRegs
00006080 _ECanaMOTSRegs
000060c0 _ECanaMOTORegs
00006100 _ECanaMboxes
00006200 _ECanbRegs
00006240 _ECanbLAMRegs
00006280 _ECanbMOTSRegs
000062c0 _ECanbMOTORegs
00006300 _ECanbMboxes
00006800 _EPwm1Regs
00006840 _EPwm2Regs
00006880 _EPwm3Regs
000068c0 _EPwm4Regs
00006900 _EPwm5Regs
00006940 _EPwm6Regs
00006a00 _ECap1Regs
00006a20 _ECap2Regs
00006a40 _ECap3Regs
00006a60 _ECap4Regs
00006a80 _ECap5Regs
00006aa0 _ECap6Regs
00006b00 _EQep1Regs
00006b40 _EQep2Regs
00006f80 _GpioCtrlRegs
00006fc0 _GpioDataRegs
00006fe0 _GpioIntRegs
00007010 _SysCtrlRegs
00007040 _SpiaRegs
00007050 _SciaRegs
00007070 _XIntruptRegs
00007100 _AdcRegs
00007750 _ScibRegs
00007770 _ScicRegs
00007900 _I2caRegs
00008000 ___cinit__
00008000 cinit
00008188 _InitFlash
000081a3 _DSP28x_usDelay
00008400 .text
00008400 _Param_Check
00008400 ___text__
00008676 _Init_Mctrl_Var
00008785 _Reset_Mctrl_Var
000088f1 _RE_Order
00008de9 _Opr_Mde_Ctrl
00008eb5 _Protect
00008fc1 _Cal_DDFJog
00008fe3 _Cal_DIFJog
00009005 _Cal_GvnDelta
00009027 _Cal_DDFNxt
00009058 _Cal_DIFNxt
0000908d _Cal_Cvf0
000090a0 _Cal_Cvf1
000090b9 _Cal_Vmin
000090d0 _Cal_RP42
000090e7 _Cal_RP43
000090fe _Cal_RP24
00009115 _Cal_RP37
0000912c _Cal_PID
00009168 _Cal_Lvalfa
0000917f _error_warning
0000919e _Stop_Drv
000091ba _Opr_Loop
00009216 _Sensor_Check
000092d8 _xint1_isr
00009a8c _Hzw_DAab_Zoom
00009abb _Hzw_DAcd_Zoom
00009ae7 _Hzw_Filter_Phir
00009b6e _FilterCal
00009c17 _AvgCal
00009dd6 _InitXintf
00009e2b _InitXintf32Gpio
00009e72 _InitXintf16Gpio
00009ec4 _Xintset
00009ef8 _FPGA_checkstate
00009f8b _epwm1_timer_isr
00009fa0 _epwm3_timer_isr
0000a0af _epwm2_timer_isr
0000a420 _epwm4_timer_isr
0000a439 _main
0000a4e1 _FlashMemCopy
0000a4e2 _IGBT_check
0000a554 _Init_MCtrlPrm
0000a5b0 _Init_SMOPrm
0000a67f _Init_HzwFilter
0000a6ce _InitFilterParam
0000a84e _InitAvgParam
0000a874 _DMAInitialize
0000a8b8 _DMACH1AddrConfig
0000a8ca _DMACH1BurstConfig
0000a8da _DMACH1TransferConfig
0000a8ea _DMACH1WrapConfig
0000a8fe _DMACH1ModeConfig
0000a95c _StartDMACH1
0000a964 _DMACH2AddrConfig
0000a976 _DMACH2BurstConfig
0000a986 _DMACH2TransferConfig
0000a996 _DMACH2WrapConfig
0000a9aa _DMACH2ModeConfig
0000aa04 _StartDMACH2
0000aa0c _DMACH3AddrConfig
0000aa1e _DMACH3BurstConfig
0000aa2e _DMACH3TransferConfig
0000aa3e _DMACH3WrapConfig
0000aa52 _DMACH3ModeConfig
0000aaac _StartDMACH3
0000aab4 _DMACH4AddrConfig
0000aac6 _DMACH4BurstConfig
0000aad6 _DMACH4TransferConfig
0000aae6 _DMACH4WrapConfig
0000aafa _DMACH4ModeConfig
0000ab54 _StartDMACH4
0000ab5c _DMACH5AddrConfig
0000ab6e _DMACH5BurstConfig
0000ab7e _DMACH5TransferConfig
0000ab8e _DMACH5WrapConfig
0000aba2 _DMACH5ModeConfig
0000abfc _StartDMACH5
0000ac04 _DMACH6AddrConfig
0000ac16 _DMACH6BurstConfig
0000ac27 _DMACH6TransferConfig
0000ac37 _DMACH6WrapConfig
0000ac4b _DMACH6ModeConfig
0000aca5 _StartDMACH6
0000acad _INT13_ISR
0000acb7 _INT14_ISR
0000acc1 _DATALOG_ISR
0000accb _RTOSINT_ISR
0000acd5 _EMUINT_ISR
0000acdf _NMI_ISR
0000ace9 _ILLEGAL_ISR
0000acf3 _USER1_ISR
0000acfd _USER2_ISR
0000ad07 _USER3_ISR
0000ad11 _USER4_ISR
0000ad1b _USER5_ISR
0000ad25 _USER6_ISR
0000ad2f _USER7_ISR
0000ad39 _USER8_ISR
0000ad43 _USER9_ISR
0000ad4d _USER10_ISR
0000ad57 _USER11_ISR
0000ad61 _USER12_ISR
0000ad6b _SEQ1INT_ISR
0000ad75 _SEQ2INT_ISR
0000ad7f _XINT1_ISR
0000ad89 _XINT2_ISR
0000ad93 _ADCINT_ISR
0000ad9d _TINT0_ISR
0000ada7 _WAKEINT_ISR
0000adb1 _EPWM1_TZINT_ISR
0000adbb _EPWM2_TZINT_ISR
0000adc5 _EPWM3_TZINT_ISR
0000adcf _EPWM4_TZINT_ISR
0000add9 _EPWM5_TZINT_ISR
0000ade3 _EPWM6_TZINT_ISR
0000aded _EPWM1_INT_ISR
0000adf7 _EPWM2_INT_ISR
0000ae01 _EPWM3_INT_ISR
0000ae0b _EPWM4_INT_ISR
0000ae15 _EPWM5_INT_ISR
0000ae1f _EPWM6_INT_ISR
0000ae29 _ECAP1_INT_ISR
0000ae33 _ECAP2_INT_ISR
0000ae3d _ECAP3_INT_ISR
0000ae47 _ECAP4_INT_ISR
0000ae51 _ECAP5_INT_ISR
0000ae5b _ECAP6_INT_ISR
0000ae65 _EQEP1_INT_ISR
0000ae6f _EQEP2_INT_ISR
0000ae79 _SPIRXINTA_ISR
0000ae83 _SPITXINTA_ISR
0000ae8d _MRINTB_ISR
0000ae97 _MXINTB_ISR
0000aea1 _MRINTA_ISR
0000aeab _MXINTA_ISR
0000aeb5 _DINTCH1_ISR
0000aebf _DINTCH2_ISR
0000aec9 _DINTCH3_ISR
0000aed3 _DINTCH4_ISR
0000aedd _DINTCH5_ISR
0000aee7 _DINTCH6_ISR
0000aef1 _I2CINT1A_ISR
0000aefb _I2CINT2A_ISR
0000af05 _SCIRXINTC_ISR
0000af0f _SCITXINTC_ISR
0000af19 _SCIRXINTA_ISR
0000af23 _SCITXINTA_ISR
0000af2d _SCIRXINTB_ISR
0000af37 _SCITXINTB_ISR
0000af41 _ECAN0INTA_ISR
0000af4b _ECAN1INTA_ISR
0000af55 _ECAN0INTB_ISR
0000af5f _ECAN1INTB_ISR
0000af69 _XINT3_ISR
0000af73 _XINT4_ISR
0000af7d _XINT5_ISR
0000af87 _XINT6_ISR
0000af91 _XINT7_ISR
0000af9b _LVF_ISR
0000afa5 _LUF_ISR
0000afaf _EMPTY_ISR
0000afbc _PIE_RESERVED
0000afc6 _rsvd_ISR
0000afd0 _CAN_TX
0000aff9 _CAN_RX
0000b00f _mailbox_read
0000b02b _InitECan
0000b030 _InitECana
0000b20f _InitECanGpio
0000b212 _InitECanaGpio
0000b228 _InitI2C
0000b23e _InitI2CGpio
0000b254 _DSPWriteE2ROM
0000b2b6 _DSPReadE2ROM
0000b318 _FIFOwrite
0000b378 _FIFOread
0000b3e4 _wait_one_second
0000b3f1 _wait_hundred_ms
0000b3fe _wait_ten_ms
0000b40b _wait_one_ms
0000b418 _delay_US
0000b424 _DSPRd_E2ROM
0000b449 _InitMcbsp
0000b44e _InitMcbspa
0000b47a _InitMcbspb
0000b4c0 _InitMcbspa8bit
0000b4c7 _InitMcbspa12bit
0000b4d2 _InitMcbspa16bit
0000b4dd _InitMcbspa20bit
0000b4e8 _InitMcbspa24bit
0000b4f3 _InitMcbspa32bit
0000b4fe _InitMcbspb8bit
0000b505 _InitMcbspb12bit
0000b510 _InitMcbspb16bit
0000b51b _InitMcbspb20bit
0000b526 _InitMcbspb24bit
0000b531 _InitMcbspb32bit
0000b53c _InitMcbspGpio
0000b53f _InitMcbspaGpio
0000b572 _InitMcbspbGpio
0000b590 _delay_loop
0000b5a6 _clkg_delay_loop
0000b5bc _clkg_delay_40CLK
0000b5d2 _spi_adc
0000b62b _InitEPwm
0000b62c _InitEPwmGpio
0000b633 _InitEPwm1Gpio
0000b637 _InitEPwm2Gpio
0000b649 _InitEPwm3Gpio
0000b65d _InitEPwmSyncGpio
0000b671 _InitTzGpio
0000b6a7 _InitEPwmTimer
0000b72c _PIDCalc
0000b78d _husat
0000b7d7 _DSP_scib
0000b7f6 _DSP_scic
0000b80e _InitSci
0000b817 _InitScibGpio
0000b82b _InitScicGpio
0000b841 _scib_init
0000b85e _scic_init
0000b879 _scia_xmitb
0000b882 _scib_xmitb
0000b88b _scib_xmit
0000b897 _scic_xmitb
0000b8a0 _scic_xmit
0000b8ac _Check_Com
0000b8d2 _InitSysCtrl
0000b8db _ServiceDog
0000b8e5 _DisableDog
0000b8ed _InitPll
0000b939 _InitPeripheralClocks
0000b994 _CsmUnlock
0000b9c5 _InitSpi
0000ba00 _spiDAC_a
0000ba20 _spiDAC_b
0000ba42 _spiDAC_c
0000ba64 _spiDAC_d
0000ba86 _InitSpiaGpio
0000baa4 _FPGA_CONFIG
0000bb18 _FPGA_CUT
0000bb4c _start_time1
0000bb51 _stop_time1
0000bb59 _InitGpio
0000bc07 _InitCpuTimers
0000bc64 _ConfigCpuTimer
0000bc9d FS$$DIV
0000bd25 _eqep1int_isr
0000bda2 _exp
0000be0c _cos
0000be6d _pow
0000bec7 _sin
0000bf1e __log
0000bf72 _InitEQep
0000bf98 _InitEQepGpio
0000bf9b _InitEQep1Gpio
0000bfba _InitAdc
0000c001 _c_int00
0000c047 _InitECap
0000c079 _InitECapGpio
0000c07c _InitECap1Gpio
0000c088 _ldexp
0000c0bd _time0int_isr
0000c0d5 _time1int_isr
0000c0ed _InitPieCtrl
0000c10c _EnableInterrupts
0000c115 _ecap1int_isr
0000c13c _sqrt
0000c15f I$$DIV
0000c170 I$$MOD
0000c181 _InitPieVectTable
0000c1a1 _local_DINTCH1_ISR
0000c1bd __args_main
0000c1d6 C$$EXIT
0000c1d6 _abort
0000c1d8 _exit
0000c1ef _frexp
0000c200 _zflag
0000c201 _Vd1
0000c203 _Iq1
0000c204 _Vq1
0000c205 _Id1
0000c205 _MemCopy
0000c206 _itemp
0000c208 _itemp0
0000c20e _Ilim
0000c210 _ziq
0000c212 _Imin
0000c214 _Valfa
0000c216 _Vbeta
0000c218 _Vq
0000c21a _Iq_err
0000c21a __register_unlock
0000c21c _Id_err
0000c21e _Iq_fed
0000c21e __register_lock
0000c220 _Id_fed
0000c222 _Im
0000c222 __nop
0000c224 _Iq_giv
0000c226 _Id_giv
0000c22a _mytheta
0000c22b ___etext__
0000c22b etext
0000c232 _tmp2
0000c234 _mytemp
0000c238 _Vd
0000c23e _tmp1
0000c240 _i2ctmp
0000c276 _Idd
0000c277 _Iqq
0000c278 _adcrtry
0000c279 _adcread1
0000c27a _adchtmp
0000c27b _adcread
0000c27c _temp1
0000c27e _temp
0000c280 _yjqTIME1
0000c281 _yjqTIME0
0000c282 _CpuTimer1
0000c28a _CpuTimer0
0000c292 _CpuTimer2
0000c29a _ReceivedChar
0000c29b _LoopCount1
0000c29c _ErrorCount
0000c29d _SendChar1
0000c29e _ReceivedChar1
0000c29f _SendChar
0000c2a0 _ErrorCount1
0000c2a1 _ReceivedChar2
0000c2a2 _SendChar2
0000c2a3 _yjqsci1
0000c2a4 _LoopCount2
0000c2a5 _LoopCount
0000c2a6 _yjqsci
0000c2a7 _ErrorCount2
0000c2a8 _yjqcan
0000c2aa _TestMbox2
0000c2ac _TestMbox3
0000c2ae _TestMbox1
0000c2b0 _DSP_RXH
0000c2b2 _DSP_RXL
0000c2b4 _I2Ctemp
0000c2b5 _send_num
0000c2b6 _yjqi
0000c2b7 _yjqi1
0000c2b8 _spisdata
0000c2b9 _spitemp
0000c2ba _j
0000c2bb _send_addr
0000c2bc _yjqflash
0000c2be _adc
0000c2c0 _yjqDMA
0000c2c2 _FPGADMADest
0000c2c4 _FPGADMASource
0000c2c6 _yjqECAP1
0000c2c8 _FP_INT_PRD
0000c2ca _FP_INT_PRD1
0000c2cc _adc_rdata
0000c2cd _adc_ch
0000c2ce _adc_rdata1
0000c2cf _adchz
0000c2d0 _adcdata
0000c2d1 _errno
0000c2d2 _yjqeqep1
0000c2d4 _moterspeed
0000c2d6 _Id
0000c2d7 _SensorNo
0000c2d8 _Iq
0000c2d9 _BrgSetVl
0000c2da __unlock
0000c2dc __lock
0000c2de __cleanup_ptr
0000c2e0 __dtors_ptr
0000c2e2 _PID_I
0000c2f0 _PID_Id
0000c300 _MCtrl_Var
0000c3b6 _FPGA_Var
0000c3c0 _zsmo
0000c440 _MCtrlPrm
0000c470 _PID_Iq
0000c480 _PID_Phi
0000c48e _PID_Speed
0000c49c _PID_uwr
0000c4aa _PID_wr
0000c4c0 _Park
0000d200 _PieVectTableInit
0000d300 _FilterA
0000d340 _FilterB
0000d380 _FilterC
0000d3c0 _hzw_filter_param
0000e000 _IqForAvg
0033fff8 _CsmPwl
00380080 _ADC_cal
ffffffff ___binit__
ffffffff ___c_args__
ffffffff ___pinit__
ffffffff binit
ffffffff pinit
[460 symbols]
Chen Jones：
能编译通过就比较奇怪，最好您将区间改改，不要重叠。
