Clock Select Input: Low = Activates Crystal Oscillator, fCLK output on CLKIO.CLKSEL置低后，fCLK output on CLKIO 有无量到正确的clock信号呢？
Reset Input: Hold low for minimum of two fCLK cycles to reset the device.
CS，DRDY等pin以及POWER等都检查并且设定正确了？
AFE58JD32: Verilog Reference Code for Driving AFE58JD32ADS1235: ADS1235、ADS1263和AD7190，三款芯片比起来那个精度和抗干扰性更强一些AFE58JD28EVM: I want to use TSW14J50EVM to evaluate AFE58JD28EVM, but I can't find the option AFE58JD28 in HSDC Pro.AFE58JD28EVM: I want to use TSW14J50EVM to evaluate AFE58JD28EVM, but I can't find the option AFE58JD28 in HSDC Pro.AFE58JD28EVM: I want to use TSW14J50EVM to evaluate AFE58JD28EVM, but I can't find the option AFE58JD28 in HSDC Pro. May I ask, where should I find the AFE58JD28 device code?ADS1675: ADS1675AFE58JD48: 寄存器配置问题
ADS4249: ADS4249 ANALOG INPUT 最大频率
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