TI中文支持网手册说读写寄存器SCLK只能是fclk两倍，那配置SLCK的时候就配置1.024MHz（我用的内部时钟），我关闭了2通道，每次转换还是16bit+2x16bit吗
user151383853：
关于这个时钟频率的问题, 我觉得也实在讨论不出什么来, 就是这样的情况, 你只能根据它的规定来适应它
ADS1191
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