DS_LL_CTL寄存器中,MTU值为0b0100_0000,一包数据长度为256bytes。数据长度不满256bytes时,例如为80bytes时,写操作时fpga收到的包头显示数据长度为7f,读操作时fpga端收到两个包头,长度分别为3f和0f;但是当数据长度为64bytes和128bytes,读写时包头都是正确的。
请问dsp生成包头的时候,有什么必须满足64bytes或者一定长度的限制吗?为什么包头不对呢?
Allen35065:
2.1.2.2 Example Packet—Streaming WriteFigure 2-3 shows an example packet as two data streams. The first is for payload sizes of 80 bytes or less, while the second applies to payload sizes of 80 to 256 bytes. SRIO packets must have a length that is an even integer of 32 bits. If the combination of physical, logical and transport layers has a length that is an integer of 16 bits, a 16-bit pad of value 0000h is added to the end of the packet, after the CRC (not shown). Bit fields that are defined as reserved are assigned to logic 0s when generated and ignored when received. All request and response packet formats are described in the RapidIO Input/Output Logical Specification and Message Passing Logical Specification.