6678 两个核下载程序相互影响，及核间中断配置-TI中文支持网

我在使用6678时，分别编写了两个核的应用程序，分别进行编译和运行正常。但是当把CORE0程序下载到核0，然后将core1程序下载到核1，时，造成CORE0运行不正常，本该正常打印的初始化信息没有打印，在while循环内打中断，出现下面的错误提示信息。

C66xx_0: Breakpoint Manager: Retrying with a AET breakpoint
C66xx_0: Trouble Setting Breakpoint with the Action "Remain Halted" at 0xc00c50e: (Error -1199 @ 0xC00C50E) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 5.1.232.0)

具体程序如下：

CORE0：

void main(void) {

Uint32   CoreNum;
int int_send_flag = 0;
TSC_init();
CoreNum = CSL_chipReadReg (CSL_CHIP_DNUM);
if(CoreNum==0)
{
  //初始化PLL
  if (C6678_Pll_Init(PLATFORM_PLL1_PLLM_val)!= TRUE)
  {
   printf("PLL failed to initialize!!!!!!!!!!!!!!!!!!!!!!!!! \n" );
  }
  else
  {
   printf("PLL succeeded in initialization\n" );
  }

  /**/
  C6678_Power_UpDomains();
  C6678_Ecc_Enable();

  //初始化DDR
  if (C6678_Ddr3_Init(PLLM_DDR3,DDR3_TYPE)!= TRUE)//DDR初始化
  {
   printf("DDR3 failed to initialize!!!!!!!!!!!!!!!!!!!!!!!!! \n" );
  }
  else
  {
   printf("DDR3 succeeded in initialization! \n" );
  }
}
C6678_TimeCounter_Enable();
// C6678_CoreInt_Init ();
// C6678_ChipInt_Init (0);
IPC_Interrupt_Init_ZZG();
// C6678_CoreInt_Set (91,5,Core0INT_ISR,NULL);
// C6678_IPC_Intc_HookUp(Core0INT_ISR,5);

memset((void *)0x80000000,0,1024);
memset((void *)0x81000000,0,1024);
memset((void *)0x82000000,0,1024);
memset((void *)0x83000000,0,1024);
memset((void *)0x84000000,0,1024);
memset((void *)0x85000000,0,1024);
memset((void *)0x86000000,0,1024);

while(1)
{

     InvalidCache((void *)0x85000000,1024);
     int_send_flag = *(volatile int*)0x85000000;
     if(int_send_flag == 1 )
        {
      *(volatile int *)(0x85000000) = 0;
      WritebackCache((void *)0x85000000,512);
   uiDoorbell_startTSC = _itoll(TSCH,TSCL);
   DEVICE_REG32_W(IPCGR(1), 0);
//   C6678_CoreInt_Manual_trigger(5);
//   C6678_IPC_Intc_send(1,1);
        }
     TSC_delay_us(50);

}
}

/*中断配置*/

void IPC_Interrupt_Init_ZZG(void)
{
gpCGEM_regs->INTMUX1 = CSL_GEM_IPC_LOCAL <<CSL_CGEM_INTMUX1_INTSEL5_SHIFT;//0;//
gpCGEM_regs->INTMUX2 = 0;
gpCGEM_regs->INTMUX3 = 0;//CSL_GEM_GPINT13 <<CSL_CGEM_INTMUX3_INTSEL13_SHIFT;

/*Clear all DSP core events，一共是4个寄存器控制这么多，清除中断事件*/
gpCGEM_regs->EVTCLR[0]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[1]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[2]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[3]= 0xFFFFFFFF;
ICR = IFR;
IER = IER|(1<<5); ////INT5的中断
//IER = IER|(1<<13); //INT13的中断
ISTP = 0x800000;
TSR = TSR|1;
IER = IER|(1<<CSL_CHIP_IER_NMI_SHIFT);

}

/*中断服务*/

interrupt void Core0INT_ISR(void)
{
volatile uint32_t read_ipcgr;
uiDoorbell_endTSC = _itoll(TSCH,TSCL);
//
read_ipcgr = DEVICE_REG32_R(IPCGR(0));
DEVICE_REG32_W(IPCAR(0), read_ipcgr);
// C6678_IPC_Intc_Clear();

TimeDiffer_Start_End = uiDoorbell_endTSC – uiDoorbell_startTSC;
printf("sync_time = %d\n",TimeDiffer_Start_End);

}

CORE1：

void main(void) {

//int int_send_flag = 0;
//初始化DDR
// C6678_TimeCounter_Enable();
// C6678_Sem2_MultiCore_Syn();
//初始化inter_Core INT
// C6678_CoreInt_Init ();
// C6678_ChipInt_Init (0);
IPC_Interrupt_Init_ZZG();
// C6678_CoreInt_Set (91,5,Core1INT_ISR,NULL);
// C6678_IPC_Intc_HookUp(Core0INT_ISR,5);

   while(1)
   {
     TSC_delay_us(50);
   }
}

中断配置部分：

/*Clear all DSP core events，一共是4个寄存器控制这么多，清除中断事件*/
gpCGEM_regs->EVTCLR[0]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[1]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[2]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[3]= 0xFFFFFFFF;
ICR = IFR;
IER = IER|(1<<5); ////INT4的中断
//IER = IER|(1<<13); //INT13的中断
ISTP = 0x800000;
TSR = TSR|1;
IER = IER|(1<<CSL_CHIP_IER_NMI_SHIFT);

}

/*中断服务*/

interrupt void Core1INT_ISR(void)
{
volatile uint32_t read_ipcgr;
uiDoorbell_endTSC = _itoll(TSCH,TSCL);
//
read_ipcgr = DEVICE_REG32_R(IPCGR(1));
DEVICE_REG32_W(IPCAR(1), read_ipcgr);

DEVICE_REG32_W(IPCGR(0), 1);
// C6678_IPC_Intc_Clear();

TimeDiffer_Start_End = uiDoorbell_endTSC – uiDoorbell_startTSC;
printf("sync_time = %d\n",TimeDiffer_Start_End);

}

两个核的CMD文件相同，如下：

-heap 0x2000
-stack 0x4000

MEMORY
{
/* Local L2, 0.5~1MB*/
VECTORS: o = 0x00800000 l = 0x00000200
LL2: o = 0x00800200 l = 0x0003FE00
LL2_RW_DATA: o = 0x00840000 l = 0x00040000

/* Shared L2 2~4MB*/
SL2: o = 0x0C000000 l = 0x00200000
/* External DDR3, upto 2GB per core */
DDR3: o = 0x80000000 l = 0x20000000
}

SECTIONS
{
vecs > VECTORS

.text           >    SL2
.cinit          >    SL2
.const          >    SL2
.switch         >    SL2
.stack          >    LL2
GROUP
{
  .neardata
  .rodata
  .bss
}   >    LL2
.far            >    LL2
.fardata        >    LL2
.cio            >    LL2
.sysmem         >    LL2
.i2ceeprom       >    LL2
/*
QMSS_Data.linkingRAM1   > SL2
QMSS_Data.Descriptor_SL2 > SL2
PacketData.buffer_SL2   > SL2
QMSS_Data.Descriptor_LL2 > LL2
PacketData.buffer_LL2   > LL2
QMSS_Data.Descriptor_DDR > DDR3_RW_DATA
PacketData.buffer_DDR   > DDR3_RW_DATA*/

}

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回复 zhenguang zhu:

谢谢分享！

6678 两个核下载程序相互影响，及核间中断配置

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