TI工程师你们好,在使用C6638处理器加载DSP代码时出现如下问题:
官网提供的代码目录如下:C:\ti\mcsdk_bios_3_00_03_15\demos\image_processing\ipc编译出来的.out文件大小为 5.221M 下载启动完成:
root@keystone-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc0/
name recovery state trace0
tarce0文件是存在
在使用我们自己工程编译出来的.out文件大小为9.731M,使用ARM0核加载.out文件时发现报错
load failed (error: -104)
root@keystone-evm:~# vi /sys/kernel/debug/remoteproc/remoteproc0/
name recovery state
tarce0文件不存在
加载方式如下:
export SLAVE_DIR=/usr/share/matrix-gui-2.0/apps/demo_imageproc/bin
mpmcl reset dsp0
mpmcl reset dsp1
mpmcl reset dsp2
mpmcl reset dsp3
mpmcl reset dsp4
mpmcl reset dsp5
mpmcl reset dsp6
mpmcl reset dsp7
mpmcl load dsp0 ./image_processing_evmtci6638k2k_slave.out
#mpmcl load dsp0 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp1 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp2 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp3 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp4 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp5 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp6 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl load dsp7 $SLAVE_DIR/image_processing_evmtci6638k2k_slave.out
mpmcl run dsp0
mpmcl run dsp1
mpmcl run dsp2
mpmcl run dsp3
mpmcl run dsp4
mpmcl run dsp5
mpmcl run dsp6
mpmcl run dsp7
请问使用这中方式加载.out文件,对文件大小有要求吗。还是需要在工程中编译.out文件时在工程中需要做什么设置,才能使用这中加载方式加载DSP代码。
user5315971:
回复 Shine:
首先感谢美女工程师在这段时间给我的帮助:问题我可能找到了,但是目前不知道如何修改,请指教,
首先我研究了官网给的工程编译出来的.out 的image_processing_evmtci6638k2k_slave.map发现如下分配:
OUTPUT FILE NAME:<image_processing_evmtci6638k2k_slave.out>
ENTRY POINT SYMBOL: "_c_int00"address: 008a7c00
MEMORY CONFIGURATIONnameoriginlengthusedunusedattrfill
——————————————————————-L2SRAM0080000000100000000a802200057fdeRW XMSMCSRAM0c000000006000000000000000600000RW XDDR380000000800000000800000078000000RWIX
SEGMENT ALLOCATION MAP
run originload originlengthinit length attrs members
——————— ———- ———– —– ——-
008000000080000000089608000000f0rw-0080000000800000000000f0000000f0rw- .resource_table008000f0008000f00008951800000000rw- .far
00889610008896100000001000000010r–00889610008896100000001000000010r– .const.1
00889620008896200001c4420001c442r-x008896200088962000017a0000017a00r-x .text008a1020008a102000004a4200004a42r– .const.2
008a5a68008a5a680000100000000000rw-008a5a68008a5a680000100000000000rw- .stack
008a6a70008a6a7000000afc00000afcrw-008a6a70008a6a7000000afc00000afcrw- .fardata
008a7570008a75700000012000000000rw-008a7570008a75700000012000000000rw- .cio
008a7690008a76900000000800000008rw-008a7690008a76900000000800000008rw- .neardata
008a7698008a76980000000800000008r–008a7698008a76980000000800000008r– .rodata
008a7800008a78000000020000000200r-x008a7800008a78000000020000000200r-x .vecs
008a7c00008a7c000000079c0000079cr-x008a7c00008a7c00000000a0000000a0r-x .text:_c_int00008a7ca0008a7ca0000006fc000006fcr– .cinit
a1000000a10000000800000000000000rw-a1000000a10000000800000000000000rw- ddr_heap对应的C6638ARM的k2h2.dtsi配置如下:
dsp0: dsp0 {compatible = "linux,rproc-user";mem = <0x10e00000 0x000080000x10f00000 0x000080000x10800000 0x00100000>;reg = <0x02620040 40x0235083c 40x02350a3c 40×02620240 4>;reg-names = "boot-address", "psc-mdstat", "psc-mdctl","ipcgr";interrupt-parent = <&ipcirq0>;interrupts = <8 0 0 0>;kick-gpio = <&ipcgpio0 27 0>;clocks = <&clkgem0>;label = "dsp0";};
DSP1到DSP7设置
dspmem: dspmem {compatible = "linux,rproc-user";mem= <0x0c000000 0x0006000000xa0000000 0x20000000>;label = "dspmem";};
而我们的.map分布如下c6638_core0.map
OUTPUT FILE NAME:<SelfTest_c6638_core0.out>
ENTRY POINT SYMBOL: "_c_int00"address: 80061dc0MEMORY CONFIGURATION
nameoriginlengthusedunusedattrfill
——————————————————————-L2SRAM_A0080000000010000000000800000ff80RW XL1PSRAM00e00000000080000000000000008000RW XL1DSRAM00f00000000080000000000000008000RWMSMCSRAM_DP0c00000000040000000203c40001fc3cRWMSM_HYPMESSAGE0c040000000240000002124000002dc0RW XMSMCSRAM_FPGA0c0640000055400000168f00003eb100RWIXMSMCSRAM_PHY_NR0c5b8000000280000000000000028000RWIXMSMCSRAM_HC0c5e00000002000000006901000196ffRW XL2SRAM10800000000e00000004b0b200094f4eRWIXL2_FPGA_PRACH_DATA1280000000001f0000001dd000000130RWIXDDR3_CODE0800000000025000000074946001db6baRW XDDR3_CODE180250000001b000000000000001b0000RW XDDR3_CODE280400000002000000000000000200000RW XDDR3_CODE380600000002000000000000000200000RW XDDR3_CODE480800000002000000000000000200000RW XDDR3_CODE580a00000002000000000000000200000RW XDDR3_CODE680c00000002000000000000000200000RW XDDR3_CODE780e00000002000000000000000200000RW XDDR3_APP_CORE08100000004000000000211f003fdee10RWIXDDR3_APP_CORE185000000040000000000000004000000RWIXDDR3_APP_CORE289000000010000000000000001000000RWIXDDR3_APP_CORE38a000000010000000000000001000000RWIXDDR3_APP_CORE48b000000010000000000000001000000RWIXDDR3_APP_CORE58c000000010000000000000001000000RWIXDDR3_APP_CORE68d000000010000000000000001000000RWIXDDR3_APP_CORE78e000000010000000000000001000000RWIXDDR3_SYS8f0000000040000000000800003ff800RWDDR3_HYPLNKDATA8f400000004000000000000000400000RWDDR3_SRIO_MSG8f800000001680000000000000168000RWIXDDR3_SRIO_INIT_FLAG8f968000000000200000000000000020RWIXDDR3_SRIO_CELL_STATUS 8f968020000004000000000000000400RWIXDDR3_PCIE_DSP_STARTa0000000000040000000224000001dc0RWIXDDR3_DRV_NORMa000400003ffc0000000000003ffc000RWIXDDR3_FPGA_DATAa40000000200000000e19630011e69d0RWIXDDR3_AIF_DATAa6000000010000000000000400fffffcRWIXSEGMENT ALLOCATION MAP
run originload originlengthinit length attrs members
——————— ———- ———– —– ——-
00800000008000000000008000000000rw-00800000008000000000008000000000rw- .L2_startflag
0c0200000c020000000003c4000003c4rw-0c0200000c0200000000034000000340rw- .hyplnk_msm0c0203400c0203400000008400000084rw- .sharedFlag
0c0400000c0400000002124000000000rw-0c0400000c0400000002124000000000rw- .hypmessage
0c0640000c06400000168f0000000000rw-0c0640000c06400000168f0000000000rw- .msmc_fpga
0c5e00000c5e000000005d0100005d01rw-0c5e00000c5e000000005d0100005d01rw- .qmss
0c5e5d800c5e5d8000000c0000000000rw-0c5e5d800c5e5d8000000c0000000000rw- .cppi
10800000108000000004365000023410rw-10800000108000000002341000023410rw- .far10823410108234100002024000000000rw- .systemHeap
10843650108436500000458200004582rw-10843650108436500000458200004582rw- .fardata
10847bd810847bd80000280000000000rw-10847bd810847bd80000280000000000rw- .stack
1084a3d81084a3d80000041000000410r–1084a3d81084a3d80000041000000410r– .switch
1084a7e81084a7e8000003a4000003a4rw-1084a7e81084a7e80000011400000114rw- .bss1084a8fc1084a8fc0000029000000290rw- .neardata
1084ab8c1084ab8c0000000c0000000cr–1084ab8c1084ab8c0000000c0000000cr– .rodata
1084ac001084ac000000020000000200r-x1084ac001084ac000000020000000200r-x .csl_vect
1084ae001084ae000000012000000000rw-1084ae001084ae000000012000000000rw- .cio
1084b0001084b0000000020000000200r-x1084b0001084b0000000020000000200r-x .vecs
128000001280000000001dd000000000rw-128000001280000000001dd000000000rw- .l2_prach_fgpa
800000008000000000071f9600071f96r-x8000000080000000000684a0000684a0r-x .text800684a0800684a000009af600009af6r– .const
80071f9880071f98000029b0000029b0r–80071f9880071f98000029b0000029b0r– .cinit
810000008100000000014ed000000000rw-810000008100000000014ed000000000rw- .DEBUG_LOG.1
81014f0081014f000000c32000000000rw-81014f0081014f000000032000000000rw- .DEBUG_LOG.281015220810152200000c00000000000rw- .appHeap
8f0000008f0000000000080000000000rw-8f0000008f0000000000080000000000rw- .dpError
a0000000a00000000000224000000000rw-a0000000a00000000000224000000000rw- .ddr_Pcie_dspInit
a4000000a400000000e1963000000000rw-a4000000a400000000e1963000000000rw- .ddr3_fpga
a6000000a60000000000000400000004rw-a6000000a60000000000000400000004rw- .appSyncSharedMem本人对k2h2.dtsi配置文件只是停留在简单的能看懂层面,如何将自己的.map设置添加到k2h2.dtsi中,求指教。
user5315971:
回复 Denny%20Yang99373:
谢谢工程师的回复,问题好像找到了,目前存在的问题是如何将自己的.MAP分配的东西添加到k2h2.dtsi配置文件,具体内容参考给美女工程师的回复,本人虽对DSP工程和linux内核都熟悉,但是对K2H2.dtsi文件如何修改成与自己产品对应的.map还是比较吃力,求指教。
user5315971:
回复 Shine:
你好,如何建立一个IPC通信的工程有说明文档吗,目前我们用的DSP核间通信都使用的是messageQ的通信机制。
user5315971:
回复 Denny%20Yang99373:
mpmcl load dsp0 ./image_processing_evmtci6638k2k_slave.out如何查看执行完此命令成后具体的错误信息显示