TI中文支持网使用K1_STK_v1.1文件中的Memory_Test例程测试DDR3时写入和读出数据不一样
软件为CCSV9，库文件为pdk_C6678_1_1_2_6
宏定义只开启了EXTERNAL_MEM_TEST和TEST_BY_DSP_CORE
DDR3 bus test测试通过，地址0x80000000到0x80000400也测试通过，再后面的测试项读写都通不过
调试信息如下
DDR bus test at 13050527 cycle
Passed Times: 1 Failed Times: 0
Set 32KB L1P, 0KB L1D, 0KB L2
DDR3 memory test at 13151660 cycle
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0x 0
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xffffffffffffffff
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xaaaaaaaaaaaaaaaa
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0x5555555555555555
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xcccccccccccccccc
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xf0f0f0f0f0f0f0f0
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xff00ff00ff00ff00
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xffff0000ffff0000
Passed Memory Fill Test from 0x80000000 to 0x80000400 with pattern 0xffffffff00000000
Passed Memory Address Test from 0x80000000 to 0x80000400
Passed Memory Bit Walking from 0x80000000 to 0x80000400
Passed Times: 2 Failed Times: 0
Set 32KB L1P, 32KB L1D, 0KB L2
DDR3 memory test at 16087598 cycle
Memory Test fails at 0x80002000, Write 0x0000000000000000, Readback 0x15a81ffd000033d2
Memory Test fails at 0x80002008, Write 0x0000000000000000, Readback 0x00080321000000d0
Memory Test fails at 0x80002010, Write 0x0000000000000000, Readback 0x4000020000000050
Memory Test fails at 0x80002018, Write 0x0000000000000000, Readback 0xa850df7f00000582
Memory Test fails at 0x80002020, Write 0x0000000000000000, Readback 0x0800008200004008
Memory Test fails at 0x80002028, Write 0x0000000000000000, Readback 0x0f8ae43b00004f91
Memory Test fails at 0x80002030, Write 0x0000000000000000, Readback 0xcff44d240000c37c
Memory Test fails at 0x80002038, Write 0x0000000000000000, Readback 0x0080822000000100
Memory Test fails at 0x80002040, Write 0x0000000000000000, Readback 0xdca3d5e90000aff5
Memory Test fails at 0x80002048, Write 0x0000000000000000, Readback 0x1120821100000200
!!!Failed Memory Fill Test at 10 Units with pattern 0x0000000000000000
user4720228：
回复 Nancy Wang:
您好，这段代码测试通过了
调试信息如下
C66xx_0: GEL Output: C6678L GEL file Ver is 2.0 C66xx_0: GEL Output: Global Default Setup…C66xx_0: GEL Output: Setup Cache… C66xx_0: GEL Output: L1P = 32K C66xx_0: GEL Output: L1D = 32K C66xx_0: GEL Output: L2 = ALL SRAM C66xx_0: GEL Output: Setup Cache… Done.C66xx_0: GEL Output: Main PLL (PLL1) Setup … C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.C66xx_0: GEL Output: SYSCLK2 = 333.333344 MHz, SYSCLK5 = 200.0 MHz.C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.C66xx_0: GEL Output: PLL1 Setup… Done.C66xx_0: GEL Output: Power on all PSC modules and DSP domains… C66xx_0: GEL Output: Security Accelerator disabled!C66xx_0: GEL Output: Power on all PSC modules and DSP domains… Done.C66xx_0: GEL Output: PA PLL (PLL3) Setup … C66xx_0: GEL Output: PA PLL Setup… Done.C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup … C66xx_0: GEL Output: DDR3 PLL Setup… Done.C66xx_0: GEL Output: DDR begin (1333 auto)C66xx_0: GEL Output: XMC Setup … Done C66xx_0: GEL Output: DDR3 initialization is complete.C66xx_0: GEL Output: DDR doneC66xx_0: GEL Output: DDR3 memory test… StartedC66xx_0: GEL Output: DDR3 memory test… PassedC66xx_0: GEL Output: PLL and DDR Initialization completed(0) …C66xx_0: GEL Output: configSGMIISerdes Setup… BeginC66xx_0: GEL Output: SGMII SERDES has been configured.C66xx_0: GEL Output: Enabling EDC …C66xx_0: GEL Output: L1P error detection logic is enabled.C66xx_0: GEL Output: L2 error detection/correction logic is enabled.C66xx_0: GEL Output: MSMC error detection/correction logic is enabled.C66xx_0: GEL Output: Enabling EDC …Done C66xx_0: GEL Output: Configuring CPSW …C66xx_0: GEL Output: Configuring CPSW …Done C66xx_0: GEL Output: Global Default Setup… Done.
user4720228：
回复 Nancy Wang:
测了一下的确可以
为什么K1_STK_v1.1中的程序不行呢？
