TI中文支持网项目需要用wince写GPMC驱动和FPGA双口ram通信。我是参考linux的GPMC和FPGA通信驱动编写。我在linu，示波器x下测试双口ram能正常工作。
代码如下，但是很多可能有错或理解不清，只能读写gpmc的寄存器，但是无法读写FPGA的ram数据，示波器也没信号
在bsp_padcfg.h中添加
#define FPGA_PADS \
PAD_ENTRY(GPMC_AD0, MODE(0) | AM335X_PIN_INPUT_PULLUP) \
PAD_ENTRY(GPMC_AD1, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD1 */ \
PAD_ENTRY(GPMC_AD2, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD2 */ \
PAD_ENTRY(GPMC_AD3, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD3 */ \
PAD_ENTRY(GPMC_AD4, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD4 */ \
PAD_ENTRY(GPMC_AD5, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD5 */ \
PAD_ENTRY(GPMC_AD6, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD6 */ \
PAD_ENTRY(GPMC_AD7, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD7 */ \
PAD_ENTRY(GPMC_AD8, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD8 */ \
PAD_ENTRY(GPMC_AD9, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD9 */ \
PAD_ENTRY(GPMC_AD10, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD10 */ \
PAD_ENTRY(GPMC_AD11, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD11 */ \
PAD_ENTRY(GPMC_AD12, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD12 */ \
PAD_ENTRY(GPMC_AD13, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD13 */ \
PAD_ENTRY(GPMC_AD14, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD14 */ \
PAD_ENTRY(GPMC_AD15, MODE(0) | AM335X_PIN_INPUT_PULLUP) /* NOR_AD15 */ \
PAD_ENTRY(GPMC_A0, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD0 */ \
PAD_ENTRY(GPMC_A1, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD1 */ \
PAD_ENTRY(GPMC_A2, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD2 */ \
PAD_ENTRY(GPMC_A3, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD3 */ \
PAD_ENTRY(GPMC_A4, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD4 */ \
PAD_ENTRY(GPMC_A5, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD5 */ \
PAD_ENTRY(GPMC_A6, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD6 */ \
PAD_ENTRY(GPMC_A7, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD7 */ \
PAD_ENTRY(GPMC_A8, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD8 */ \
PAD_ENTRY(GPMC_A9, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD9 */ \
PAD_ENTRY(GPMC_A10, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD10 */ \
PAD_ENTRY(GPMC_A11, MODE(0) | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA) /* NOR_AD11 */ \
PAD_ENTRY(GPMC_ADVN_ALE, MODE(0) | AM33XX_PULL_DISA) /* NAND_ADV_ALE */ \
PAD_ENTRY(GPMC_OEN_REN, MODE(0) | AM33XX_PULL_DISA) /* NAND_OE */ \
PAD_ENTRY(GPMC_WEN, MODE(0) | AM33XX_PULL_DISA) /* NAND_WEN */ \
PAD_ENTRY(GPMC_BE0N_CLE, MODE(0) | AM33XX_PULL_DISA) /* NAND_BE_CLE */ \
PAD_ENTRY(GPMC_CSN1, MODE(0) | AM33XX_PULL_DISA) /* MMC1_CLK */ \
PAD_ENTRY(GPMC_CLK, MODE(0) | AM33XX_PULL_DISA)
在bsp_padcfg.c中添加
{ FPGAPads, AM_DEVICE_FPGA, PROFILE_3, DEV_ON_DGHTR_BRD},
最后编写驱动fpga.c
#define STNOR_GPMC_CONFIG1 0x28601000 // no wait, 16 bit, non multiplexed
#define STNOR_GPMC_CONFIG2 0x00011001
#define STNOR_GPMC_CONFIG3 0x00020201 // we don't use ADV
#define STNOR_GPMC_CONFIG4 0x08031003
#define STNOR_GPMC_CONFIG5 0x000f1111
#define STNOR_GPMC_CONFIG6 0x0f030080
#define BSP_GPMC_PSOC_CONFIG7 0x00000F41 // Base address 0x1000000, 16MB window
#define BSP_GPMC_PSOC_CONFIG7_1 0x00000F01
DWORD FGA_Init(LPCTSTR szContext, LPCVOID pBusContext)
{
DWORD rc = (DWORD)NULL;
NKDbgPrintfW(TEXT("FPGA init.\n"));
PHYSICAL_ADDRESS pa;
InitializeCriticalSection(&g_csOpen);
InitializeCriticalSection(&g_csRead);
InitializeCriticalSection(&g_csWrite);
FpgaDevice *pDevice = NULL;
pDevice = (FpgaDevice *)LocalAlloc(LPTR, sizeof(FpgaDevice));
if (pDevice == NULL) {
NKDbgPrintfW(TEXT("FPGA init error.\n"));
return -1; }
int error;
UINT32 val;
UINT32 vison;
pa.QuadPart = GPMC_BASE_ADDR;
// AM3XX_GPMC_REGS_PA is defined as 0x50000000
pDevice->pGpmc = (AM3XX_GPMC_REGS *)MmMapIoSpace(pa, sizeof(AM3XX_GPMC_REGS), FALSE);
DEBUGMSG(ZONE_ERROR,(L"pGpmc_base= %x\n", pDevice->pGpmc));
vison=INREG32(&pDevice->pGpmc->GPMC_REVISION);
DEBUGMSG(ZONE_ERROR,(L"vison = %d.%d\n",(vison >> 4) & 0x0f, vison & 0x0f));
OUTREG32(&pDevice->pGpmc->GPMC_CONFIG, BSP_GPMC_PSOC_CONFIG7_1); // disabling the chip select
DEBUGMSG(ZONE_ERROR,(L"gpmc base = %x\n",pDevice->pGpmc));
OUTREG32(&pDevice->pGpmc->GPMC_CONFIG, (INREG32(&pDevice->pGpmc->GPMC_CONFIG))|0x00000002); //setting LIMITEDADDRESS to 1.
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG7);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG7 value default 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG1, STNOR_GPMC_CONFIG1);
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG2, STNOR_GPMC_CONFIG2);
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG3, STNOR_GPMC_CONFIG3);
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG4, STNOR_GPMC_CONFIG4);
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG5, STNOR_GPMC_CONFIG5);
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG6, STNOR_GPMC_CONFIG6);
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG7, BSP_GPMC_PSOC_CONFIG7);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG7);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG7 value 0x%x\n", val));
pa.QuadPart = 0x1000000;
pDevice->fpga_base = (volatile FPGAREG16 *)MmMapIoSpace(pa, 2048, FALSE);
DEBUGMSG(ZONE_ERROR,(L"fpga_base= %x\n", pDevice->fpga_base));
rc = (DWORD)pDevice;
return rc;
DWORD FGA_Read(DWORD context, VOID *pBuffer, DWORD size)
{ int status = 0,i,tmp;
RETAILMSG(ZONE_ERROR,(L"read here"));
int len; // UCHAR* pData = (UCHAR*)pBuffer;
FpgaDevice *pDevice =(FpgaDevice *)context; //EnterCriticalSection(&g_csRead); // VALIDATE_ADDR_PORT(basead)
DEBUGMSG(ZONE_ERROR,(L"fpga base = %x\n",pDevice->fpga_base));
len=size; for(i=0;i<len;i=i+2)
{
tmp = INREG16(&pDevice->fpga_base+i);
pDevice->userbuff[i] = tmp&0xff; pDevice->userbuff[i+1] = (tmp>>8)&0xff;
}
// DEBUGMSG(ZONE_ERROR,(L"read = %x%x\n",pBuffer[0],pBuffer[1]));
memcpy(pBuffer,pDevice->userbuff,size);
// LeaveCriticalSection(&g_csRead);
return size;
}
我想知道应该如何写，找不到参考资料
Gino E：
你好：
既然你已经在Linux下实现了对FPGA的读写，我建议你先在wince驱动初始化的时候打印出GPMC寄存器的值，然后和linux下的寄存器值进行对比。确保GPMC timing正确。
yase sabar：
回复 Gino E:
寄存器我已经在串口中打印出来了，已经能写入和读取，这个和linux设置一致，但是我发现错误出现在pad_cfg里面，配置引脚功能的时候会出现引脚已经使用错误，我把错误跳过去继续仍然不行，wince支持引脚复用么？LCD和FPGA的双口ram部分硬件是复用的，并且是不同的mode。我想问下wince的bsp包是不是不支持引脚复用，
Gino E：
回复 Gino E:
你好，
另外，在wince驱动设计方面
1. 确保你的驱动已经在wince中被加载， 不知道你是否使用的是动态加载方式。
2. 在你的应用程序中，是否可以open这个驱动。
Gino E：
回复 yase sabar:
你好，
你可以尝试将pinmux的初始化放在驱动的Read/Write函数里面，这样不知道是否可以解决你遇到的问题。
yase sabar：
回复 Gino E:
应该已经加载，启动的时候init函数已经执行，配置寄存器和地址映射。我不知道怎么动态加载驱动？
驱动是可以打开的，open函数无问题，读写的时候无读写信号
yase sabar：
回复 Gino E:
我是放在init函数中
if (RequestAndConfigurePadArray(FPGAPads)==FALSE)
{ DEBUGMSG(ZONE_ERROR, (L"ERROR: FPGA_Init: Cannot configure FPGA pads\r\n"));
} // NKDbgPrintfW(TEXT(" AM_DEVICE_FPGA=%d\n",AM_DEVICE_FPGA));
if (!RequestDevicePads(AM_DEVICE_FPGA))
{
DEBUGMSG(ZONE_ERROR, (L"ERROR: FPGA Pads: Cannot configure=%d\r\n",AM_DEVICE_FPGA));
}这两个函数方式我都试过，两个函数都会执行这个
BOOL RequestAndConfigurePadArray(const PAD_INFO* padArray)
{
BOOL rc = TRUE;
int i = 0; PadCfgLock(); // Check that all pads are valid and released
i=0;
while (rc && (padArray[i].padID != (UINT16) -1))
{
int padIndex;
padIndex = FindPad(padArray[i].padID);
if (padIndex == -1)
{ goto error; }
if (padIndex >= g_NbPads)
{
ASSERT(0); goto error;
}
if (g_bspPadInfo[padIndex].inUse)
{
OALMSG(1, (L"pad inused\r\n"));
// goto error;
} i++;
}
// Request and Configure all pads
i = 0;
while (rc && (padArray[i].padID != (UINT16) -1))
{
int padIndex;
padIndex = FindPad(padArray[i].padID);
g_bspPadInfo[padIndex].inUse = 1;
SOCSetPadConfig(padArray[i].padID,(UINT16)padArray[i].Cfg);
i++;
}
PadCfgUnlock();
return TRUE;
error:
PadCfgUnlock();
return FALSE;
}
我把那个inuse 那行goto error 注释掉了，然后加了打印信息。 配置完后会出现这个打印信息
Gino E：
回复 yase sabar:
你好，
我觉得你是否可以再你的驱动里面直接对pinmux寄存器进行读写，而不是使用申请PAD的方式。
yase sabar：
回复 Gino E:
申请pad也是对pinmux寄存器读写，直接写的话估计太麻烦，用api一样。我是在想，wince的bsp包是不是不支持引脚复用功能？或者我地址映射和读取写入是否有误？
#define BSP_GPMC_PSOC_CONFIG7 0x00000F41 // Base address 0x1000000, 16MB window
PHYSICAL_ADDRESS pa;
pa.QuadPart = 0x1000000;
pDevice->fpga_base =(REG16 *) MmMapIoSpace(pa,0x100, FALSE);
tmp = INREG16(&pDevice->fpga_base); // 读
OUTREG16(&pDevice->fpga_base ,tmp); // 写
Gino E：
回复 yase sabar:
你好，
我之前的建议是让你不要用那套pad机制，而是直接读写。这样做就可以验证bsp是否支持引脚复用。
地址的访问，需要取决于你对应的GPMC config寄存器。假如你在当前的cs下的配置地址是0x1000000，那就没有问题。
yase sabar：
回复 Gino E:
#define AM33X_L4_CNTRL_MODULE_PA 0x44E10000
//——————————————————————————
#define AM33X_OCP_CONF_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0000)
#define AM33X_DEVICE_BOOT_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0040)
#define AM33X_SECnFUSE_KEY_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0100)
#define AM33X_SECURE_SM_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0300)
#define AM33X_SUPPL_DEVICE_CTRL_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0400)
#define AM33X_DEVICE_CONF_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0600)
//#define AM33X_STATUS_CONTROL_REGS_PA AM33X_DEVICE_CONF_REGS_PA
#define AM33X_SYSC_PADCONFS_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0800)
#define AM33X_PINCTRL_REGS_PA AM33X_SYSC_PADCONFS_REGS_PA
#define AM33X_SYSC_MISC_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0E00)
#define AM33X_SYSC_INTR_DMA_MUX_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x0F00)
#define AM33X_SYSC_MISC2_REGS_PA (AM33X_L4_CNTRL_MODULE_PA + 0x1000)
static UINT32* g_pPadCfg = NULL;
int error;
UINT32 val;
UINT32 vison;
pa.QuadPart = GPMC_BASE_ADDR; // AM3XX_GPMC_REGS_PA is defined as 0x50000000
pDevice->pGpmc = (AM3XX_GPMC_REGS *)MmMapIoSpace(pa, sizeof(AM3XX_GPMC_REGS), FALSE);
DEBUGMSG(TRUE,(L"pGpmc_base= %x\n", pDevice->pGpmc));
vison=INREG32(&pDevice->pGpmc->GPMC_REVISION);
DEBUGMSG(ZONE_ERROR,(L"vison = %d.%d\n",(vison >> 4) & 0x0f, vison & 0x0f));
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG7);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG7 value default 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG1, STNOR_GPMC_CONFIG1);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG1);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG1 value 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG2, STNOR_GPMC_CONFIG2);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG2);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG2 value 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG3, STNOR_GPMC_CONFIG3);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG3);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG3 value 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG4, STNOR_GPMC_CONFIG4);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG4);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG4 value 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG5, STNOR_GPMC_CONFIG5);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG5);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG5 value 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG6, STNOR_GPMC_CONFIG6);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG6);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG6 value 0x%x\n", val));
OUTREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG7, BSP_GPMC_PSOC_CONFIG7);
val =INREG32(&pDevice->pGpmc->CS[1].GPMC_CONFIG7);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG7 value 0x%x\n", val));
val =INREG32(&pDevice->pGpmc->CS[0].GPMC_CONFIG7);
DEBUGMSG(ZONE_ERROR,(L"GPMC_CS_CONFIG7_0 value 0x%x\n", val));
static UINT32* g_pPadCfg = NULL;
pa.QuadPart = AM33X_SYSC_PADCONFS_REGS_PA;
g_pPadCfg=(UINT32 *)MmMapIoSpace(pa,0x200, FALSE);
OUTREG32(&g_pPadCfg[0], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD0
OUTREG32(&g_pPadCfg[1], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD1
OUTREG32(&g_pPadCfg[2], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD2
OUTREG32(&g_pPadCfg[3], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD3
OUTREG32(&g_pPadCfg[4], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD4
OUTREG32(&g_pPadCfg[5], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD5
OUTREG32(&g_pPadCfg[6], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD6
OUTREG32(&g_pPadCfg[7], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD7
OUTREG32(&g_pPadCfg[8], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD8
OUTREG32(&g_pPadCfg[9], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD9
OUTREG32(&g_pPadCfg[10], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD10
OUTREG32(&g_pPadCfg[11], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD11
OUTREG32(&g_pPadCfg[12], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD12
OUTREG32(&g_pPadCfg[13], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD13
OUTREG32(&g_pPadCfg[14], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD14
OUTREG32(&g_pPadCfg[15], MODE(0) | AM335X_PIN_INPUT_PULLUP); //GPMC_AD15
OUTREG32(&g_pPadCfg[16], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A0
OUTREG32(&g_pPadCfg[17], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A1
OUTREG32(&g_pPadCfg[18], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A2
OUTREG32(&g_pPadCfg[19], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A3
OUTREG32(&g_pPadCfg[20], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A4
OUTREG32(&g_pPadCfg[21], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A5
OUTREG32(&g_pPadCfg[22], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A6
OUTREG32(&g_pPadCfg[23], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A7
OUTREG32(&g_pPadCfg[24], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A8
OUTREG32(&g_pPadCfg[25], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A9
OUTREG32(&g_pPadCfg[26], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A10
OUTREG32(&g_pPadCfg[27], MODE(0) | AM335X_PIN_OUTPUT | PULLUDEN); //GPMC_A11
OUTREG32(&g_pPadCfg[32], MODE(0) | PULLUDEN); //GPMC_CSN1
OUTREG32(&g_pPadCfg[35], MODE(0) | PULLUDEN); //GPMC_CLK
OUTREG32(&g_pPadCfg[36], MODE(0) | PULLUDEN); //GPMC_ADVN_ALE
OUTREG32(&g_pPadCfg[37], MODE(0) | PULLUDEN); //GPMC_OEN_REN
OUTREG32(&g_pPadCfg[38], MODE(0) | PULLUDEN); //GPMC_WEN
OUTREG32(&g_pPadCfg[39], MODE(0) | PULLUDEN); //GPMC_BE0N_CLE
static UINT32* g_Cfg = NULL;
pa.QuadPart = AM33X_DEVICE_CONF_REGS_PA;
g_Cfg=(UINT32 *)MmMapIoSpace(pa,0x100, FALSE);
val =INREG32(&g_Cfg[0]);
DEBUGMSG(ZONE_ERROR,(L"device_id value 0x%x\n", val));
pa.QuadPart=0x01000000;
pDevice->fpga_base =(REG16 *) MmMapIoSpace(pa,0x100, FALSE);
// if (RequestAndConfigurePadArray(FPGAPads)==FALSE){
// DEBUGMSG(ZONE_ERROR, (L"ERROR: FPGA_Init: Cannot configure FPGA pads\r\n"));
// }
DEBUGMSG(ZONE_ERROR,(L"fpga_base= %x\n", pDevice->fpga_base));
DEBUGMSG(ZONE_ERROR,(L"fpga_base1= %x\n", pDevice->fpga_base+1));
DEBUGMSG(ZONE_ERROR,(L"fpga_base2= %x\n", pDevice->fpga_base+2));
int tmp;
tmp = INREG16(&pDevice->fpga_base);
DEBUGMSG(ZONE_ERROR,(L"read = %x %x\n",tmp&0xff,(tmp>>8)&0xff));
这个是直接读写，我是觉得没啥差别，以下是串口打印信息
PRT:DLL_PROCESS_ATTACHyy
PID:00400002 TID:0137000 6 FPGA init
PID:00400002 TID:01370006 MmMapIoSpace to 50000000 map registers memory
PID:00400002 TID:01370006 pGpmc_base= b3320000
PID:00400002 TID:01370006 vison = 6.0
PID:00400002 TID:01370006 GPMC_CS_CONFIG7 value default 0xf00
PID:00400002 TID :01370006 GPMC_CS_CONFIG1 value 0x28601000
PID:00400002 TID:01370006 GPMC_CS_CONF IG2 value 0x11001
PID:00400002 TID:01370006 GPMC_CS_CONFIG3 value 0x20201
PID:0040 0002 TID:01370006 GPMC_CS_CONFIG4 value 0x8031003
PID:00400002 TID:01370006 GPMC_ CS_CONFIG5 value 0xf1111
PID:00400002 TID:01370006 GPMC_CS_CONFIG6 value 0xf030080
PID:00400002 TID:01370006 GPMC_CS_CONFIG7 value 0xf41
PID:00400002 TID:01370006 GPMC_CS_CONFIG7_0 value 0x848
PID:00400002 TID:01370006 MmMapIoSpace to 44e108 00 map registers memory
PID:00400002 TID:01370006 MmMapIoSpace to 44e10600 map registers memory
PID:00400002 TID:01370006 device_id value 0x2b94402e
PID:00400002 TID:01370006 MmMapIoSpace to 01000000 map registers memory
PID:00400002 TID:01370006 fpga_base= b3330000
PID:00400002 TID:01370006 fpga_base 1= b3330002
PID:00400002 TID:01370006 fpga_base2= b3330004
PID:00400002 TID:013700 06 read = 0 0
PID:00400002 TID:01370006 read = 0 0
PID:00400002 TID:01370006 fpga_ base[0]= 0
PID:00400002 TID:01370006 fpga_base[1]= 0
device_id value 0x2b94402e
是读取的device_id寄存器 中间是b944，应该是没问题吧。我只是测试下这个寄存器设置。
31-28 devrev R 0h Device revision.
0000b – Silicon Revision 1.0
0001b – Silicon Revision 2.0
0010b – Silicon Revision 2.1 See device errata for detailed information on functionality in each device revision.
27-12 partnum R B944h Device part number (unique JTAG ID)
11-1 mfgr R 017h Manufacturer's JTAG ID
0 Reserved R 0h
现在读到的还是00.FPGA默认里面是放了数据的
