TI中文支持网请问各位：这里的PROFILE是做什么用的？这些值是根据什么确定的？
/* REVIST : check posibility of PROFILE_(x) syntax usage */
#define PROFILE_NONE -1 /* Few EVM doesn't have profiles */
#define PROFILE_0 (0x1 << 0)
#define PROFILE_1 (0x1 << 1)
#define PROFILE_2 (0x1 << 2)
#define PROFILE_3 (0x1 << 3)
#define PROFILE_4 (0x1 << 4)
#define PROFILE_5 (0x1 << 5)
#define PROFILE_6 (0x1 << 6)
#define PROFILE_7 (0x1 << 7)
#define PROFILE_ALL 0xFF
比如 {uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)}
uart1是根据什么选的PROFILE_0 | PROFILE_3 | PROFILE_5，还有，uart1明明接在daughterboard，为什么这里是DEV_ON_BASEBOARD？
Steven Liu1：
这个profile的值，决定了一些管脚的pinmux配置，从而使得这个GPEVM板能够进行更多功能的验证。具体的profile值对应的pinmux的配置信息可以参考：
http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_CPLD
这个是wl12xx模块吧，没仔细看过，但这个wireless的模块是在baseboard上面有插槽接口的。建议你仔细看一下原理图，是不是被复用了。
Sean：
回复 Steven Liu1:
您好，首先感谢您的回复，这个不是uart1吗？它是这么定义的：
static struct pinmux_config uart1_wl12xx_pin_mux[] = { {"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT}, {"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT}, {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL}, {NULL, 0},};
跟这个复用，但是profibus_pin_mux不在gen_purp_evm_dev_cfg数组里，应该不会被调用吧
static struct pinmux_config profibus_pin_mux[] = { {"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT}, {"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT}, {"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT}, {NULL, 0},};
我还有一些问题
1.uart1需要在硬件上做处理吗？还是只要配置正确，不被复用，就能正常使用？
2.uart1的配置过程，步骤能给我讲讲吗？
3.uart0是在哪里初始化的，我在board-am335xevm.c上没有找到
PS：不好意思，问题有点多，但是我实在是不懂，我在别的帖子问，也没人告诉我，烦请您耐心解答，万分感谢！
Sean：
回复 Steven Liu1:
您好，感谢您的解答，这是默认的配置，这么配置正确吗？应该怎么确认呢？还有关于profile的值，我看不大明白，您能给我举个例子吗？比如就拿uart1来说
(PROFILE_0 | PROFILE_3 | PROFILE_5) ，设置了哪些pinmux？
board-am335xevm.c:
static struct pinmux_config uart1_wl12xx_pin_mux[] = { {"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT}, {"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT}, {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL}, {NULL, 0},};
static void uart1_wl12xx_init(int evm_id, int profile){ setup_pin_mux(uart1_wl12xx_pin_mux);}
{uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},
mux33xx.c:
_AM33XX_MUXENTRY(UART1_CTSN, 0, "uart1_ctsn", NULL, NULL, "i2c2_sda", "spi1_cs0", NULL, NULL, "gpio0_12"), _AM33XX_MUXENTRY(UART1_RTSN, 0, "uart1_rtsn", NULL, NULL, "i2c2_scl", "spi1_cs1", NULL, NULL, "gpio0_13"), _AM33XX_MUXENTRY(UART1_RXD, 0, "uart1_rxd", "mmc1_sdwp", NULL, "i2c1_sda", NULL, "pr1_uart0_rxd_mux1", NULL, "gpio0_14"), _AM33XX_MUXENTRY(UART1_TXD, 0, "uart1_txd", "mmc2_sdwp", NULL, "i2c1_scl", NULL, "pr1_uart0_txd_mux1", NULL, "gpio0_15"),
omap_hwmod_33xx_data.c:
/* uart1 */static struct omap_hwmod_dma_info uart1_edma_reqs[] = { { .name = "tx", .dma_req = 26, }, { .name = "rx", .dma_req = 27, }, { .dma_req = -1 }};static struct omap_hwmod_addr_space am33xx_uart1_addr_space[] = { { .pa_start = 0x44E09000, .pa_end = 0x44E09000 + SZ_8K – 1, .flags = ADDR_TYPE_RT, }, { }};static struct omap_hwmod_ocp_if am33xx_l4_wkup__uart1 = { .master = &am33xx_l4wkup_hwmod, .slave = &am33xx_uart1_hwmod, .clk = "uart1_ick", .addr = am33xx_uart1_addr_space, .user = OCP_USER_MPU,};static struct omap_hwmod_irq_info am33xx_uart1_irqs[] = { { .irq = 72 }, { .irq = -1 }};static struct omap_hwmod_ocp_if *am33xx_uart1_slaves[] = { &am33xx_l4_wkup__uart1,};static struct omap_hwmod am33xx_uart1_hwmod = { .name = "uart1", .class = &uart_class, .clkdm_name = "l4_wkup_clkdm", .mpu_irqs = am33xx_uart1_irqs, .main_clk = "uart1_fck", .sdma_reqs = uart1_edma_reqs, .prcm = { .omap4 = { .clkctrl_offs = AM33XX_CM_WKUP_UART0_CLKCTRL_OFFSET, .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = am33xx_uart1_slaves, .slaves_cnt = ARRAY_SIZE(am33xx_uart1_slaves),};
