TI中文支持网貼上修改範例的Code(參考datasheet、手把手教你學f28335)
想請問一下，為何程式跑到最後紅字的時候
其互補模式下的EPWMB 則會反相?
一般來說沒有設定上、下或上下計數時，不會產生互補結果才對
另一個問題是
有無一個指令同步開啟 EPwm[1-3]TBCTL.bit.CTRMODE的功能?
雖然90Mhz很快，但是以實際面來講 就不算同步輸出PWM了
EPwm1Regs.TBPRD = SP;
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // Update period
EPwm1Regs.TBCTR = 0;
EPwm1Regs.TBCTL.bit.PHSDIR = TB_DIV1;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.CMPA.half.CMPA = SP/2; // Duty Cycle 50%
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Update Dutycycle
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // When CTR = 0, update it
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm1Regs.DBRED = 0; // Dead-Band Generator Rising Edge Delay Count Register
EPwm1Regs.DBFED = 0; // Dead-Band Generator Falling Edge Delay Count Register
EPwm1Regs.TBCTL.bit.CTRMODE = TB_FREEZE; << 初始化設定不計數
SHIH CIH-HUEI：
反向問題仍然無法解決
但同步問題只要修改以下程序即可同步計數
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC
貼上修改範例的Code(參考datasheet、手把手教你學f28335)
想請問一下，為何程式跑到最後紅字的時候
其互補模式下的EPWMB 則會反相?
一般來說沒有設定上、下或上下計數時，不會產生互補結果才對
另一個問題是
有無一個指令同步開啟 EPwm[1-3]TBCTL.bit.CTRMODE的功能?
雖然90Mhz很快，但是以實際面來講 就不算同步輸出PWM了
EPwm1Regs.TBPRD = SP;
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // Update period
EPwm1Regs.TBCTR = 0;
EPwm1Regs.TBCTL.bit.PHSDIR = TB_DIV1;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.CMPA.half.CMPA = SP/2; // Duty Cycle 50%
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Update Dutycycle
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // When CTR = 0, update it
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm1Regs.DBRED = 0; // Dead-Band Generator Rising Edge Delay Count Register
EPwm1Regs.DBFED = 0; // Dead-Band Generator Falling Edge Delay Count Register
EPwm1Regs.TBCTL.bit.CTRMODE = TB_FREEZE; << 初始化設定不計數
Eric Ma：
EPwm1Regs.TBCTL.bit.CTRMODE = TB_FREEZE
这个模式就是使能计数，在TBCLK同步之后，就马上开始计数了，另外，之所以反相，是因为你设置了死区：
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
ERIC
