TI中文支持网向地址为0x4c000008的寄存器SDRAM_CONFIG Register Field Descriptions写入0x61C04BB2，在Technical Reference手册中，该寄存器bit9-7有如下描述
/***********************************************************************/
Row Size.
Defines the number of row address bits of connected SDRAM
devices.
Set to 0 for 9 row bits, set to 1 for 10 row bits, set to 2 for 11 row
bits, set to 3 for 12 row bits, set to 4 for 13 row bits, set to 5 for 14
row bits, set to 6 for 15 row bits, and set to 7 for 16 row bits.
This field is only used when reg_ibank_pos field in SDRAM Config
register is set to 1, 2, or 3, or reg_ebank_pos field in SDRAM
Config_2 register is set to 1.
/***********************************************************************/
但是根据写入的值，发现
reg_ibank_pos field in SDRAM Config
register is set to 1, 2, or 3, or reg_ebank_pos field in SDRAM这俩个条件都不满足，就是说bit9-7的配置是无效的，那么在配置无效的情况下
am335x真实使用的row_size是多大呢
Shine：
请参考TRM里的7.3.3.4 Address Mapping章节
www.ti.com/…/spruh73p.pdf
