arm 加载.out 文件报错

AM5728

ccs7.4

生成elf 格式的.out 文件 

在ARM侧加载报错

echo 40800000.dsp > /sys/bus/platform/drivers/omap-rproc/bind
[ 109.521327] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000
[ 109.529217] remoteproc remoteproc2: 40800000.dsp is available
root@AM57xx-Tronlong:~/bin# [ 109.785292] remoteproc remoteproc2: powering up 40800000.dsp
[ 109.790991] remoteproc remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 2731416
[ 109.805518] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0
[ 109.811409] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0
[ 109.817272] remoteproc remoteproc2: Failed to find resource table

请工程师帮看看这是什么原因

yongqing wang：

参考一下这个回答：e2e.ti.com/…/2315032

yongqing wang：

回复 yongqing wang:

还有这个：e2e.ti.com/…/627727

user6015339：

回复 yongqing wang:

参考上面连接在工程中增加了rsc_table_dsp1.h文件，并且在 .CFG 文件增加：
var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
Resource.customTable = true;

rsc_table_dsp1.h与app.cfg 文件如下
#ifndef _RSC_TABLE_DSP1_H_
#define _RSC_TABLE_DSP1_H_

#include <ti/ipc/remoteproc/rsc_types.h>

/* DSP Memory Map */
#define L4_DRA7XX_BASE0x4A000000

#define L4_PERIPHERAL_L4CFG(L4_DRA7XX_BASE)
#define DSP_PERIPHERAL_L4CFG0x4A000000

#define L4_PERIPHERAL_L4PER10x48000000
#define DSP_PERIPHERAL_L4PER10x48000000

#define L4_PERIPHERAL_L4PER20x48400000
#define DSP_PERIPHERAL_L4PER20x48400000

#define L4_PERIPHERAL_L4PER30x48800000
#define DSP_PERIPHERAL_L4PER30x48800000

#define L4_PERIPHERAL_L4EMU0x54000000
#define DSP_PERIPHERAL_L4EMU0x54000000

#define L3_PERIPHERAL_DMM0x4E000000
#define DSP_PERIPHERAL_DMM0x4E000000

#define L3_TILER_MODE_0_10x60000000
#define DSP_TILER_MODE_0_10x60000000

#define L3_TILER_MODE_20x70000000
#define DSP_TILER_MODE_20x70000000

#define L3_TILER_MODE_30x78000000
#define DSP_TILER_MODE_30x78000000

#define DSP_MEM_TEXT0x95000000
/* Co-locate alongside TILER region for easier flushing */
#define DSP_MEM_IOBUFS0x80000000
#define DSP_MEM_DATA0x95100000
#define DSP_MEM_HEAP0x95200000

//0x85900000
#define DSP_SR0_VIRT0xBFC00000
#define DSP_SR00xBFC00000

#define DSP_MEM_IPC_DATA0x9F000000
#define DSP_MEM_IPC_VRING0xA0000000
#define DSP_MEM_RPMSG_VRING00xA0000000
#define DSP_MEM_RPMSG_VRING10xA0004000
#define DSP_MEM_VRING_BUFS00xA0040000
#define DSP_MEM_VRING_BUFS10xA0080000

#define DSP_MEM_IPC_VRING_SIZESZ_1M
#define DSP_MEM_IPC_DATA_SIZESZ_1M
#define DSP_MEM_TEXT_SIZESZ_1M
#define DSP_MEM_DATA_SIZESZ_1M
#define DSP_MEM_HEAP_SIZE(SZ_1M * 3)
#define DSP_MEM_IOBUFS_SIZE(SZ_1M * 90)
#define DSP_SR0_SIZE(SZ_1M * 16)

//#define DSP_CMEM_IOBUFS0x85000000
//#define PHYS_CMEM_IOBUFS 0xA0000000
//#define DSP_CMEM_IOBUFS_SIZE (SZ_1M * 16)

/** Assign fixed RAM addresses to facilitate a fixed MMU table.*/
/* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */

#define VAYU_DSP_1

#if defined (VAYU_DSP_1)
#define PHYS_MEM_IPC_VRING0x99000000
#elif defined (VAYU_DSP_2)
#define PHYS_MEM_IPC_VRING0x9F000000
#endif

/* Need to be identical to that of IPU */
#define PHYS_MEM_IOBUFS0xBA300000

/** Sizes of the virtqueues (expressed in number of buffers supported,* and must be power of 2)*/
#define DSP_RPMSG_VQ0_SIZE256
#define DSP_RPMSG_VQ1_SIZE256

/* flip up bits whose indices represent features we support */
#define RPMSG_DSP_C0_FEATURES1

struct my_resource_table {struct resource_table base;
UInt32 offset[18];/* Should match 'num' in actual definition */
/* rpmsg vdev entry */struct fw_rsc_vdev rpmsg_vdev;struct fw_rsc_vdev_vring rpmsg_vring0;struct fw_rsc_vdev_vring rpmsg_vring1;
/* text carveout entry */struct fw_rsc_carveout text_cout;
/* data carveout entry */struct fw_rsc_carveout data_cout;
/* heap carveout entry */struct fw_rsc_carveout heap_cout;
/* ipcdata carveout entry */struct fw_rsc_carveout ipcdata_cout;
/* trace entry */struct fw_rsc_trace trace;
/* devmem entry */struct fw_rsc_devmem devmem0;
/* devmem entry */struct fw_rsc_devmem devmem1;
/* devmem entry */struct fw_rsc_devmem devmem2;
/* devmem entry */struct fw_rsc_devmem devmem3;
/* devmem entry */struct fw_rsc_devmem devmem4;
/* devmem entry */struct fw_rsc_devmem devmem5;
/* devmem entry */struct fw_rsc_devmem devmem6;
/* devmem entry */struct fw_rsc_devmem devmem7;
/* devmem entry */struct fw_rsc_devmem devmem8;
/* devmem entry */struct fw_rsc_devmem devmem9;
/* devmem entry */struct fw_rsc_devmem devmem10;
/* devmem entry */struct fw_rsc_devmem devmem11;
};

extern char ti_trace_SysMin_Module_State_0_outbuf__A;
#define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A

#pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table")
#pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096)

struct my_resource_table ti_ipc_remoteproc_ResourceTable = {1,/* we're the first version that implements this */18,/* number of entries in the table */0, 0,/* reserved, must be zero *//* offsets to entries */{offsetof(struct my_resource_table, rpmsg_vdev),offsetof(struct my_resource_table, text_cout),offsetof(struct my_resource_table, data_cout),offsetof(struct my_resource_table, heap_cout),offsetof(struct my_resource_table, ipcdata_cout),offsetof(struct my_resource_table, trace),offsetof(struct my_resource_table, devmem0),offsetof(struct my_resource_table, devmem1),offsetof(struct my_resource_table, devmem2),offsetof(struct my_resource_table, devmem3),offsetof(struct my_resource_table, devmem4),offsetof(struct my_resource_table, devmem5),offsetof(struct my_resource_table, devmem6),offsetof(struct my_resource_table, devmem7),offsetof(struct my_resource_table, devmem8),offsetof(struct my_resource_table, devmem9),offsetof(struct my_resource_table, devmem10),offsetof(struct my_resource_table, devmem11),},
/* rpmsg vdev entry */{TYPE_VDEV, VIRTIO_ID_RPMSG, 0,RPMSG_DSP_C0_FEATURES, 0, 0, 0, 2, { 0, 0 },/* no config data */},/* the two vrings */{ DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 },{ DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 },
{TYPE_CARVEOUT,DSP_MEM_TEXT, 0,DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT",},
{TYPE_CARVEOUT,DSP_MEM_DATA, 0,DSP_MEM_DATA_SIZE, 0, 0, "DSP_MEM_DATA",},
{TYPE_CARVEOUT,DSP_MEM_HEAP, 0,DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP",},
{TYPE_CARVEOUT,DSP_MEM_IPC_DATA, 0,DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA",},
{TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp",},
{TYPE_DEVMEM,DSP_MEM_IPC_VRING, PHYS_MEM_IPC_VRING,DSP_MEM_IPC_VRING_SIZE, 0, 0, "DSP_MEM_IPC_VRING",},
{TYPE_DEVMEM,DSP_MEM_IOBUFS, PHYS_MEM_IOBUFS,DSP_MEM_IOBUFS_SIZE, 0, 0, "DSP_MEM_IOBUFS",},
{TYPE_DEVMEM,DSP_TILER_MODE_0_1, L3_TILER_MODE_0_1,SZ_256M, 0, 0, "DSP_TILER_MODE_0_1",},
{TYPE_DEVMEM,DSP_TILER_MODE_2, L3_TILER_MODE_2,SZ_128M, 0, 0, "DSP_TILER_MODE_2",},
{TYPE_DEVMEM,DSP_TILER_MODE_3, L3_TILER_MODE_3,SZ_128M, 0, 0, "DSP_TILER_MODE_3",},
{TYPE_DEVMEM,DSP_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG,SZ_16M, 0, 0, "DSP_PERIPHERAL_L4CFG",},
{TYPE_DEVMEM,DSP_PERIPHERAL_L4PER1, L4_PERIPHERAL_L4PER1,SZ_2M, 0, 0, "DSP_PERIPHERAL_L4PER1",},
{TYPE_DEVMEM,DSP_PERIPHERAL_L4PER2, L4_PERIPHERAL_L4PER2,SZ_4M, 0, 0, "DSP_PERIPHERAL_L4PER2",},
{TYPE_DEVMEM,DSP_PERIPHERAL_L4PER3, L4_PERIPHERAL_L4PER3,SZ_8M, 0, 0, "DSP_PERIPHERAL_L4PER3",},
{TYPE_DEVMEM,DSP_PERIPHERAL_L4EMU, L4_PERIPHERAL_L4EMU,SZ_16M, 0, 0, "DSP_PERIPHERAL_L4EMU",},
{TYPE_DEVMEM,DSP_PERIPHERAL_DMM, L3_PERIPHERAL_DMM,SZ_1M, 0, 0, "DSP_PERIPHERAL_DMM",},
{TYPE_DEVMEM,DSP_SR0_VIRT, DSP_SR0,DSP_SR0_SIZE, 0, 0, "DSP_SR0",},
};

#endif /* _RSC_TABLE_VAYU_DSP_H_ */

/******app.cfg ******/

var Defaults = xdc.useModule('xdc.runtime.Defaults');
var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Log = xdc.useModule('xdc.runtime.Log');
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
var Main = xdc.useModule('xdc.runtime.Main');
var Memory = xdc.useModule('xdc.runtime.Memory')
var SysMin = xdc.useModule('xdc.runtime.SysMin');
var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');

var BIOS = xdc.useModule('ti.sysbios.BIOS');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Swi = xdc.useModule('ti.sysbios.knl.Swi');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');

var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
Ipc.procSync = Ipc.ProcSync_PAIR;
Ipc.sr0MemorySetup = true;
//xdc.useModule('ti.ipc.ipcmgr.IpcMgr');
//Program.global.procName = "DSP1";
//var ipc_cfg = xdc.loadCapsule("ipc.cfg.xs");

/**======== ipc.cfg.xs ========*/

/* root of the configuration object model */

var Program = xdc.useModule('xdc.cfg.Program');
var cfgArgs = Program.build.cfgArgs;
Program.global.procName = "DSP1";
/* configure processor names */
var procNameAry = ["HOST","DSP1","DSP2"];
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
MultiProc.setConfig(Program.global.procName, procNameAry);

/* shared region configuration */
var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');

/* configure SharedRegion #0 (IPC) */
/*var evmDRA7XX_SR_0 = {name: "SR_0", space: "data", access: "RWX",base: 0xBFC00000, len: 0x10000000,comment: "SR#0 Memory (16 MB)"
};*/
//var SR0Mem = Program.cpu.memoryMap["SR_0"];

//var SHAREDMEM= 0xA0000000;
//var SHAREDMEMSIZE= 0x10000000;
SharedRegion.setEntryMeta(0,new SharedRegion.Entry({name:"SR_0",base:0xBFC00000,len:0x10000000,ownerProcId:MultiProc.getIdMeta("DSP1"),isValid:true,cacheEnable:true})
);

/** Uncomment this line to globally disable Asserts.* All modules inherit the default from the 'Defaults' module.You* can override these defaults on a per-module basis using Module.common$. * Disabling Asserts will save code space and improve runtime performance.
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;*/

/** Uncomment this line to keep module names from being loaded on the target.* The module name strings are placed in the .const section. Setting this* parameter to false will save space in the .const section.Error and* Assert messages will contain an "unknown module" prefix instead* of the actual module name.
Defaults.common$.namedModule = false;*/

/** Minimize exit handler array in System.The System module includes* an array of functions that are registered with System_atexit() to be* called by System_exit().*/
System.maxAtexitHandlers = 4;

/* * Uncomment this line to disable the Error print function.* We lose error information when this is disabled since the errors are* not printed.Disabling the raiseHook will save some code space if* your app is not using System_printf() since the Error_print() function* calls System_printf().
Error.raiseHook = null;*/

/* * Uncomment this line to keep Error, Assert, and Log strings from being* loaded on the target.These strings are placed in the .const section.* Setting this parameter to false will save space in the .const section.* Error, Assert and Log message will print raw ids and args instead of* a formatted message.
Text.isLoaded = false;*/

/** Uncomment this line to disable the output of characters by SysMin* when the program exits.SysMin writes characters to a circular buffer.* This buffer can be viewed using the SysMin Output view in ROV.
SysMin.flushAtExit = false;*/

/** The BIOS module will create the default heap for the system.* Specify the size of this default heap.*/
BIOS.heapSize = 0x2000;

/** Build a custom SYS/BIOS library from sources.*/
BIOS.libType = BIOS.LibType_Custom;

/* System stack size (used by ISRs and Swis) */
Program.stack = 0x2000;

/* Circular buffer size for System_printf() */
SysMin.bufSize = 0x200;

/* * Create and install logger for the whole system*/
var loggerBufParams = new LoggerBuf.Params();
loggerBufParams.numEntries = 16;
var logger0 = LoggerBuf.create(loggerBufParams);
Defaults.common$.logger = logger0;
Main.common$.diags_INFO = Diags.ALWAYS_ON;

System.SupportProxy = SysMin;

//Program.sectMap[".tracebuf"] = "TRACE_BUF";
//Program.sectMap[".errorbuf"] = "EXC_DATA";

var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
//Resource.loadSegment = "EXT_CODE";
Resource.customTable = true;

编译出错Linking>
"../main.c", line 42: warning #179-D: variable "status" was declared but never referenced
"../main.c", line 88: warning #112-D: statement is unreachable
"../main.c", line 77: warning #552-D: variable "name" was set but never used
"configPkg/linker.cmd", line 206: warning #10096-D: specified address lies outside memory map
error #10264: DEFAULT memory range overlaps existing memory range L2SRAM
error #10264: DEFAULT memory range overlaps existing memory range OCMC_RAM1
error #10264: DEFAULT memory range overlaps existing memory range OCMC_RAM2
error #10264: DEFAULT memory range overlaps existing memory range OCMC_RAM3
error #10264: DEFAULT memory range overlaps existing memory range EXT_RAM
undefinedfirst referencedsymbolin file————————-ti_trace_SysMin_Module_State_0_outbuf__A ./main.obj
请问这个内存配置 怎么修改，没有找到在哪儿配置OCMC_RAM1

Shine：

请参考下面的wiki网站。
processors.wiki.ti.com/…/Processor_SDK_RTOS_BOOT_AM57x