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在使用SEED xds560v2 USB emulator通过JTAG连接一块AM5728开发板DSP时，ccs（版本8.3.0）中Test Connection报错：
[Start: SEED XDS560V2 USB Emulator_0]
Execute the command:
%ccs_base%/common/uscif/dbgjtag.exe -f %boarddatafile% -rv -F inform,logfile=yes -S pathlength -S integrity
[Result]
—–[Print the board config pathname(s)]————————————
C:\Users\admin\AppData\Local\TEXASI~1\CCS\
ti\0\0\BrdDat\testBoard.dat
—–[Print the reset-command software log-file]—————————–
This utility has selected a 560/2xx-class product.
This utility will load the program 'seed560v2u.out'.
Loaded FPGA Image: E:\ti\ccsv8\ccs_base\common\uscif\dtc_top.jbc
The library build date was 'Nov 20 2018'.
The library build time was '23:11:38'.
The library package version is '8.0.903.2'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '6' (0x00000006).
The controller has an insertion length of '0' (0x00000000).
The cable+pod has a version number of '8' (0x00000008).
The cable+pod has a capability number of '7423' (0x00001cff).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
—–[Print the reset-command hardware log-file]—————————–
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the Nano-TBC VHDL.
The link is a 560-class second-generation-560 cable.
The software is configured for Nano-TBC VHDL features.
The controller will be software reset via its registers.
The controller has a logic ONE on its EMU[0] input pin.
The controller has a logic ONE on its EMU[1] input pin.
The controller will use falling-edge timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '2' (0x0002).
The utility logic has not previously detected a power-loss.
The utility logic is not currently detecting a power-loss.
Loaded FPGA Image: E:\ti\ccsv8\ccs_base\common\uscif\dtc_top.jbc
An error occurred while hard opening the controller.
—–[An error has occurred and this utility has aborted]——————–
This error is generated by TI's USCIF driver or utilities.
The value is '-501' (0xfffffe0b).
The title is 'SC_ERR_TEST_MEASURE'.
The explanation is:
The built-in scan-path length measurement failed.
The built-in scan-path reliability tests cannot be
performed without knowledge of the scan-path length.
Try specifying the scan-path lengths in the command-line
options or board configuration file of this utility or debugger.
另外改变改变JTAG TCLK频率也没有效果，有时候也会报下面错误：
—–[An error has occurred and this utility has aborted]——————–
This error is generated by TI's USCIF driver or utilities.
The value is '-233' (0xffffff17).
The title is 'SC_ERR_PATH_BROKEN'.
The explanation is:
The JTAG IR and DR scan-paths cannot circulate bits, they may be broken.
An attempt to scan the JTAG scan-path has failed.
The target's JTAG scan-path appears to be broken
with a stuck-at-ones or stuck-at-zero fault.
请帮忙看下什么原因。非常感谢。
yongqing wang：
设置低频率是否有改善吗
yongqing wang：
设置低频率是否有改善吗
Nancy Wang：
您是购买的开发板的吗？可以先参考以下链接检查一下。
dev.ti.com/…/node
shi Li：
回复 yongqing wang:
你好，我修改了不同的JTAG频率，测量连接时要么报501错误，要么报233错误，上面的就是不同频率下的错误信息。
shi Li：
回复 Nancy Wang:
是的，使用的是国内匠牛的开发板mini5728，链接我看了一下，如果是硬件问题对我来说比较难查。他们基本没有技术支持和说明文档。
yongqing wang：
回复 shi Li:
有设置到1MHZ吗
Nancy Wang：
回复 shi Li:
换仿真器试试或者在多台主机上测试一下，也查查看仿真器驱动是不是安装好了以及连接主机的usb线，多方面排查一下原因。
