TI中文支持网我需要配置timer5作为pwm函数，根据论坛中的其他帖子修改地址，运行程序可以出现pwm波形，但需要修改周期和占空比，但修改失败了。
改为2500us循环，修改了三个地方，但测试周期是错误的
TLDR寄存器值ffffffae
PRE 0 TCLR寄存器48
时钟输入为32 kHz CLKSEL_TIMER5_CLK 0x02
修改手册中的寄存器TLDR寄存器的值改为FFFF FFF0，时钟最初选择为32kHZ，PRE = 0，周期应为500us，但实际波形周期不是。
下面是代码是测试示例的实现：
#!/bin/sh
echo "Configuring Timer 5…\n"
#Select TIMER5 CLOCK SOURCE CLKSEL_TIMER5_CLK
devmem2 0x44E00518 w 0x2
#Enable timer to access its ctrl regs CM_PER_TIMER5_CLKCTRL
devmem2 0x44e000ec w 0x2
# Timer configurations.. Stop Timer. TCLR Register
# Auto-Reload
# Compare Mode Enabled
# Trigger set on overflow
# Toggle Mode
devmem2 0x48046038 w 0x48
# Set the re-load value
devmem2 0x48046040 w 0xFFFFFD39
# Setting a duty cycle to 50.7% TMAR Register
devmem2 0x4804604c w 0xFFFFFE9C
#set trigger TLDR Register
devmem2 0x48046044 w 0xFFFFFFF0
# Force the Timer to Smart-Idle TIOCP_CFG Register
devmem2 0x48046010 w 0x8
# Start Timer TCLR Register
devmem2 0x48046038 w 0x184B
# Verify that the timer is running,
# by polling the count register a
# few times. We should we up counting.
for i in {1..2}
do
echo "Timer Value $i"
devmem2 0x4804603C TCRR Register
# End
echo "Timer is Running!"
echo ""
echo "See J9 21 on the EVM" GPIO2_5——-TIMER5
echo ""
# Delay added to allow time for the first timer
# overflow to occur, before any consecutive memory
# accesses are made. (Just for standby testing).
sleep 1000
done
# Disable MODULEMODE of CM_PER_TIMER4_CLKCTRL register
# Only if this value is 0, are we able to wake-up from standby??
devmem2 0x44e000ec w 0x0
#END
测试手册中示例的波形：
我想让你帮我看看哪里有问题？
＃将占空比设置为50.7％TMAR寄存器
devmem2 0x4804604c w 0xFFFFFE9C
另外，我想知道如何计算占空比配置。
谢谢！！
Shine：
请问您测出来的周期是多少？
