TI中文支持网在编译 codec server app 时均没报错，但是在开发板上运行时却提示CEapp-> ERROR: can't open engine lvengine
错误，我是修改了mem_ext 的数据了的，请求专家帮助。。加急！！！！！
Coolen Xue：
你在开发板上，用“ CE_DEBUG=2 ./app.out ” 运行app,把输出的信息贴一下吧。
chunhua peng：
回复 Coolen Xue:
root@192.168.0.230:/opt/target/test# CE_DEBUG=2 ./app.out
App-> Application started.
@0,484,399us: [+4 T:0x400176d8] OG – Global_init> This program was built with the following packages:
@0,484,718us: [+4 T:0x400176d8] OG – package gnu.targets.rts470MV (/opt/dvsdk_1_40_02_33/xdc_3_00_06/packages/gnu/targets/rts470MV/) [1,0,0,0,1203621000516]
@0,484,846us: [+4 T:0x400176d8] OG – package ti.xdais.dm (/opt/dvsdk_1_40_02_33/xdais_6_10_01/packages/ti/xdais/dm/) [1,0,4,1210262746529]
@0,484,954us: [+4 T:0x400176d8] OG – package ti.xdais (/opt/dvsdk_1_40_02_33/xdais_6_10_01/packages/ti/xdais/) [1,2,1,1210262742149]
@0,485,076us: [+4 T:0x400176d8] OG – package ti.sdo.utils.trace (/opt/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/utils/trace/) [1,0,0,1220943366422]
@0,485,195us: [+4 T:0x400176d8] OG – package ti.sdo.ce.utils.xdm (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/utils/xdm/) [1,0,1,1220951322616]
@0,485,310us: [+4 T:0x400176d8] OG – package ti.sdo.fc.dman3 (/opt/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/dman3/) [1,0,3,1220943053023]
@0,485,421us: [+4 T:0x400176d8] OG – package ti.sdo.fc.acpy3 (/opt/dvsdk_1_40_02_33/framework_components_2_10_02/packages/ti/sdo/fc/acpy3/) [1,0,2,1220943014135]
@0,485,534us: [+4 T:0x400176d8] OG – package dsplink.gpp (/opt/dvsdk_1_40_02_33/dsplink-davinci-v1.50-prebuilt/packages/dsplink/gpp/) [3,0,0]
@0,485,638us: [+4 T:0x400176d8] OG – package ti.sdo.linuxutils.cmem (/opt/dvsdk_1_40_02_33/cmem_2_10/packages/ti/sdo/linuxutils/cmem/) [2,0,1,1204929560755]
@0,485,749us: [+4 T:0x400176d8] OG – package ti.catalog.c470 (/opt/dvsdk_1_40_02_33/xdc_3_00_06/packages/ti/catalog/c470/) [1,0,1,0,1203561761475]
@0,485,853us: [+4 T:0x400176d8] OG – package ti.catalog.c6000 (/opt/dvsdk_1_40_02_33/xdc_3_00_06/packages/ti/catalog/c6000/) [1,0,0,0,1203561781695]
@0,485,958us: [+4 T:0x400176d8] OG – package ti.platforms.evmDM6467 (/opt/dvsdk_1_40_02_33/bios_5_32_01/packages/ti/platforms/evmDM6467/) [1,0,0,0,1192229633217]
@0,486,069us: [+4 T:0x400176d8] OG – package ti.sdo.ce.osal (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/osal/) [2,0,2,1220951127739]
@0,486,177us: [+4 T:0x400176d8] OG – package ti.sdo.ce.ipc (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/) [2,0,1,1220951085787]
@0,486,284us: [+4 T:0x400176d8] OG – package ti.sdo.ce.alg (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/alg/) [1,0,1,1220950781938]
@0,486,390us: [+4 T:0x400176d8] OG – package ti.sdo.ce.osal.linux (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/osal/linux/) [2,0,1,1220951140072]
@0,486,503us: [+4 T:0x400176d8] OG – package ti.sdo.ce.ipc.dsplink (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/ipc/dsplink/) [2,0,1,1220951096818]
@0,486,616us: [+4 T:0x400176d8] OG – package ti.sdo.ce (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/) [1,0,6,1220950771473]
@0,486,720us: [+4 T:0x400176d8] OG – package ti.sdo.ce.video (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/video/) [1,0,3,1220951334122]
@0,486,828us: [+4 T:0x400176d8] OG – package ti.sdo.ce.lvproject.codec (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/examples/ti/sdo/ce/lvproject/codec/) []
@0,486,934us: [+4 T:0x400176d8] OG – package ti.sdo.ce.bioslog (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/bioslog/) [1,0,1,1220950800329]
@0,487,043us: [+4 T:0x400176d8] OG – package ti.sdo.ce.utils.trace (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/packages/ti/sdo/ce/utils/trace/) [1,0,1,1220951317087]
@0,487,156us: [+4 T:0x400176d8] OG – package ceapp (/opt/dvsdk_1_40_02_33/codec_engine_2_10_02/examples/ti/sdo/ce/lvproject/app/ceapp/) []
@0,487,701us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Sem_create> count: 0
@0,487,849us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_create> sem[0x3f1c0]
@0,487,950us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Sem_create> count: 0
@0,488,037us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_create> sem[0x3f1d8]
@0,488,132us: [+0 T:0x400176d8] OT – Thread_create> Enter (fxn=0x137f8, attrs=0x0)
@0,488,494us: [+0 T:0x400176d8] OT – Thread_create> Exit (task=0x3f210)
@0,823,268us: [+0 T:0x400176d8] ti.sdo.ce.alg – ALG_init> Enter
@0,823,368us: [+0 T:0x400176d8] ti.sdo.ce.alg – ALG_init> Exit
@0,823,524us: [+6 T:0x400176d8] CE – Engine_init> CE debugging on (CE_DEBUG=2; allowed CE_DEBUG levels: 1=min, 2=good, 3=max)
@0,823,704us: [+0 T:0x400176d8] CS – Server_init()
@0,823,796us: [+0 T:0x400176d8] CS – Server_init> Global_useLinkArbiter = 0
@0,823,977us: [+0 T:0x400176d8] CE – Engine_open> Enter('lvengine', 0x0, 0xbefffc44)
@0,824,096us: [+0 T:0x400176d8] CE – rserverOpen('lvserver.x64P'), count = 0
@0,824,221us: [+0 T:0x400176d8] OP – Processor_create> Enter(imageName='lvserver.x64P', linkCfg='(null)', attrs=0xbefffc48)
@0,824,540us: [+1 T:0x40946b60] OP – daemon> thread created.
@0,824,677us: [+0 T:0x40946b60] OP – getCmd_d> Enter (proc=0x409465a4)
@0,824,842us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Entered Sem_pend> sem[0x3f1c0] timeout[0xffffffff]
@0,825,105us: [+0 T:0x400176d8] OP – doCmd> Enter (cmdId=1, proc=0x3f4d8)
@0,825,214us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Entered Sem_post> sem[0x3f1c0]
@0,825,336us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_post> sem[0x3f1c0]
@0,825,433us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Entered Sem_pend> sem[0x3f1d8] timeout[0xffffffff]
@0,825,553us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Leaving Sem_pend> sem[0x3f1c0] status[0]
@0,825,656us: [+0 T:0x40946b60] OP – getCmd_d> Exit (result=1)
@0,825,733us: [+0 T:0x40946b60] OP – Processor_create_d> Enter(proc=0x3f4d8)
@0,825,813us: [+2 T:0x40946b60] OP – Processor_create_d> Initializing DSP PROC…
@0,825,900us: [+2 T:0x40946b60] OP – Processor_create_d> Using DspLink config data for entry #0 [server 'lvserver.x64P']
@0,826,057us: [+2 T:0x40946b60] OP – Processor_create_d> Adding DSP segment #0 to Link configuration: name='DDR2', startAddress=0x8fa00000, sizeInBytes=0x400000, shared=1
@0,826,203us: [+2 T:0x40946b60] OP – Processor_create_d> Adding DSP segment #1 to Link configuration: name='DSPLINKMEM', startAddress=0x8fe00000, sizeInBytes=0x100000, shared=1
@0,826,338us: [+2 T:0x40946b60] OP – Processor_create_d> Adding DSP segment #2 to Link configuration: name='RESET_VECTOR', startAddress=0x8ff00000, sizeInBytes=0x80, shared=0
@0,826,469us: [+2 T:0x40946b60] OP – Processor_create_d> Adding DSP segment #3 to Link configuration: name='DDRALGHEAP', startAddress=0x88000000, sizeInBytes=0x7a00000, shared=0
@0,826,600us: [+2 T:0x40946b60] OP – Processor_create_d> DOPOWERCONTROL was=0; now=0
@0,829,379us: [+7 T:0x40946b60] OP – Processor_create_d> Loading and starting DSP server 'lvserver.x64P' FAILED, status=[0x80008008] (look for error code 'DSP_EBASE + 0x8' in dsplink*/packages/dsplink/gpp/inc/errbase.h)
@0,829,782us: [+0 T:0x40946b60] OP – Processor_delete_d> Enter (proc=0x3f4d8)
@0,830,140us: [+2 T:0x40946b60] OP – Processor_delete_d> Closing remote transport…
@0,830,285us: [+6 T:0x40946b60] OP – Processor_delete_d> Closing remote transport FAILED, status=0x80008002.
@0,830,396us: [+2 T:0x40946b60] OP – Processor_delete_d> Stopping DSP…
@0,830,504us: [+6 T:0x40946b60] OP – Processor_delete_d> Stopping DSP FAILED, status=0x80008000
@0,830,605us: [+2 T:0x40946b60] OP – Processor_delete_d> Closing pool…
@0,830,688us: [+6 T:0x40946b60] OP – Processor_delete_d> Closing pool FAILED, status=0x80008000
@0,830,780us: [+2 T:0x40946b60] OP – Processor_delete_d> Detaching from DSP…
@0,830,886us: [+6 T:0x40946b60] OP – Processor_delete_d> Detaching from DSP FAILED, status=0x80008000
@0,830,986us: [+2 T:0x40946b60] OP – Processor_delete_d> Destroying DSP… (object, that is)
@0,831,075us: [+6 T:0x40946b60] OP – Processor_delete_d> Destroying DSP FAILED, status=0x80008000
@0,831,173us: [+0 T:0x40946b60] OP – Processor_delete_d> return
@0,831,250us: [+2 T:0x40946b60] OP – Processor_create_d> return (0)
@1,164,160us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Entered Sem_post> sem[0x3f1d8]
@1,164,286us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Leaving Sem_post> sem[0x3f1d8]
@1,164,381us: [+0 T:0x40946b60] OP – getCmd_d> Enter (proc=0x409465a4)
@1,164,463us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Entered Sem_pend> sem[0x3f1c0] timeout[0xffffffff]
@1,164,583us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_pend> sem[0x3f1d8] status[0]
@1,164,682us: [+0 T:0x400176d8] OP – doCmd> Exit (result=2)
@1,164,755us: [+0 T:0x400176d8] OP – Processor_delete> Enter(proc=0x3f4d8)
@1,164,832us: [+1 T:0x400176d8] OP – Processor_delete(0x3f4d8) freeing object …
@1,164,916us: [+0 T:0x400176d8] OP – Processor_delete> return.
@1,164,988us: [+6 T:0x400176d8] CE – rserverOpen: can't start 'lvserver.x64P'; Processor_create failed
@1,165,077us: [+0 T:0x400176d8] CE – rserverOpen('lvserver.x64P'): 0x0 done.
@1,165,160us: [+0 T:0x400176d8] CE – Engine_close(0x3f4a8)
@1,165,239us: [+0 T:0x400176d8] CE – Engine_open> return(0)
CEapp-> ERROR: zzzzzzzzcan't open engine lvengine
App-> Application FAILED.
@1,165,501us: [+0 T:0x400176d8] OP – doCmd> Enter (cmdId=3, proc=0x0)
@1,165,597us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Entered Sem_post> sem[0x3f1c0]
@1,165,698us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_post> sem[0x3f1c0]
@1,165,789us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Entered Sem_pend> sem[0x3f1d8] timeout[0xffffffff]
@1,165,906us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Leaving Sem_pend> sem[0x3f1c0] status[0]
@1,166,007us: [+0 T:0x40946b60] OP – getCmd_d> Exit (result=3)
@1,166,087us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Entered Sem_post> sem[0x3f1d8]
@1,166,183us: [+0 T:0x40946b60] ti.sdo.ce.osal.Sem – Leaving Sem_post> sem[0x3f1d8]
@1,166,417us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_pend> sem[0x3f1d8] status[0]
@1,166,533us: [+0 T:0x400176d8] OP – doCmd> Exit (result=1)
@1,166,609us: [+0 T:0x400176d8] OT – Thread_delete> Enter (task=0x3f210)
@1,166,713us: [+4 T:0x400176d8] OT – Thread_delete> pthread_cancel (0x3)
@1,166,818us: [+4 T:0x400176d8] OT – Thread_delete> pthread_join (0x0)
@1,166,928us: [+0 T:0x400176d8] OT – Thread_delete> Exit (task=0x3f210)
@1,167,014us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Entered Sem_delete> sem[0x3f1c0]
@1,167,119us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_delete>
@1,167,203us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Entered Sem_delete> sem[0x3f1d8]
@1,167,292us: [+0 T:0x400176d8] ti.sdo.ce.osal.Sem – Leaving Sem_delete>
root@192.168.0.230:/opt/target/test#
chunhua peng：
回复 chunhua peng:
CEapp-> ERROR: zzzzzzzzcan't open engine lvengine
在这句附近，上面还提示can't start 'lvserver.x64P'; Processor_create failed
，帮忙分析下，多谢。。。。
Coolen Xue：
回复 chunhua peng:
“@0,829,379us: [+7 T:0x40946b60] OP – Processor_create_d> Loading and starting DSP server 'lvserver.x64P' FAILED, status=[0x80008008] (look for error code 'DSP_EBASE + 0x8' in dsplink*/packages/dsplink/gpp/inc/errbase.h)”
很多时候可以查看这个errbase.h找到错误原因，不过，我查了下，你这个是“A general failure occurred ”，那可能的原因就很多了。
我手头没有板子可以试，无法重现你的现象，有几个猜测，你可以参考一下：
1，lvserver.x64P是否拷到了目标板上？
2，运行" lsmod | grep dsplink " 命令，看dsplink.ko是否成功加载？
3，仔细检查app端的cfg文件，或者你可以贴出来一下，看有没有配错。
4， 检查server端的tcf文件，特别是内存分配，内存上堆与栈的分配，可能会导致加载不了x64p.
5, 你之前是否有重编过dvsdk或者dsplink?
6, 提醒一下，我注意到你用的是dvsdk_1_40_02_33，这是一个比较老版本的dvsdk,使用dm6467T 的话，最好到以下链接，下载最新版本，因为，老版本的dvsdk下，时钟的配置，编码器和codec engine的版本，都会让你的芯片发挥不了最佳性能。
software-dl.ti.com/…/index_FDS.html
7，上面说的几种可能，根据调试信息，有些是可以排除的，不过，你最好还是都仔细检查下。
chunhua peng：
回复 Coolen Xue:
1、
root@192.168.0.230:/opt/target/test# ls
app.out in.dat lvserver.x64P video_copy-bak.x64P
cmemk.ko loadmodules.sh out.dat video_copy.x64P
2、
root@192.168.0.230:/opt/target/test# ./unloadmodules.sh
root@192.168.0.230:/opt/target/test# ./loadmodules.sh
ioremap_nocache(0x87800000, 8388608)=0xc8100000
allocated heap buffer 0xc8100000 of size 0x4ac000
cmem initialized 3 pools between 0x87800000 and 0x88000000
DSPLINK Module (1.50) created on Date: Jan 3 2008 Time: 13:16:55
root@192.168.0.230:/opt/target/test# lsmod | grep dsplink
dsplinkk 98220 0
root@192.168.0.230:/opt/target/test#
3、server的tcf
var platform = environment["config.platform"];
print("platform = " + platform);
/*
* Setup platform-specific memory map:
*/
/*var mem_ext = [
{
comment: "DDRALGHEAP: off-chip memory for dynamic algmem allocation",
name: "DDRALGHEAP",
base: 0x88000000, // 128MB
len: 0x07A00000, // 122MB
space: "code/data"
},
{
comment: "DDR2: off-chip memory for application code and data",
name: "DDR2",
base: 0x8FA00000, // 250MB
len: 0x00400000, // 4MB
space: "code/data"
},
{
comment: "DSPLINK: off-chip memory reserved for DSPLINK code and data",
name: "DSPLINKMEM",
base: 0x8FE00000, // 254MB
len: 0x00100000, // 1MB
space: "code/data"
},
{
comment: "RESET_VECTOR: off-chip memory for the reset vector table",
name: "RESET_VECTOR",
base: 0x8FF00000,
len: 0x00000080, //128KB
space: "code/data"
},
];
*/
var mem_ext = [
{
comment: "DDRALGHEAP: off-chip memory for dynamic algmem allocation",
name: "DDRALGHEAP",
base: 0x88000000, //
len: 0x07A00000, //
space: "code/data"
},
{
comment: "DDR2: off-chip memory for application code and data",
name: "DDR2",
base: 0x8FA00000, //
len: 0x00400000, //
space: "code/data"
},
{
comment: "DSPLINK: off-chip memory reserved for DSPLINK code and data",
name: "DSPLINKMEM",
base: 0x8FE00000, //
len: 0x00100000, //
space: "code/data"
},
{
comment: "RESET_VECTOR: off-chip memory for the reset vector table",
name: "RESET_VECTOR",
base: 0x8FF00000,
len: 0x00000080, //128KB
space: "code/data"
},
];
/*
* Internal memory partitioning for DM6446
*
* On the left in the diagram below is the layout of internal memory
* available on DM6446 for data caching and as RAM; on the right is the
* diagram showing how this configuration file partitions the available
* 64k+80k of memory. (The 32K for program cache is not affected by this
* configuration, and not shown below.) Please find more specifics on how
* the configuration is done further below.
*
*
* Physical internal memory on DM6446 Default partitioning in this .tcf
*
* |//////////| |//////////|
* 0x11800000 +———-+ 0x11800000 +———-+
* | L2Cache | | |
* | and/or | 64k | L2 Cache | 64k
* | IRAM | | |
* | | | |
* 0x11810000 +———-+ 0x11810000 +———-+
* |//////////| |//////////|
* : : : :
* |//////////| |//////////|
* 0x11F04000 +———-+ 0x11F04000 +———-+
* | | | |
* | L1DSRAM | 48k | L1DSRAM |
* | | | | 64k
* 0x11F10000 +- – – – – + | |
* |L1Cache or| 32k +- – – – – +
* |more L1DSR| 0x11F14000 | L1 cache | 16k
* 0x11F18000 +———-+ 0x11F18000 +———-+
* |//////////| |//////////|
*/
/*
* Specify the L2 CACHE memory setting. This value indicates how the physical
* internal memory of size 64K starting at 0x11800000 will be split between
* L2 cache and a general-purpose internal memory segment IRAM. The options
* are:
* l2Mode: "0k" — IRAM is 64K long, starts at 0x11800000; no L2 cache
* l2Mode: "32k" — IRAM is 32K long, starts at 0x11800000; L2 cache is
* 32K long, starts at 0x11808000
* l2Mode: "64k" — no IRAM; L2 cache is 64k long, starts at 0x11800000
*/
if (platform == "ti.platforms.evmDM6446") {
var device_regs = {
l2Mode: "64k"
};
var params = {
clockRate: 594,
catalogName: "ti.catalog.c6000",
deviceName: "DM6446",
regs: device_regs,
mem: mem_ext
};
}
/*
* Internal memory partitioning for DM6467
*
* On the left in the diagram below is the layout of internal memory
* available on DM6467 for data caching and as RAM; on the right is the
* diagram showing how this configuration file partitions the available
* 128k+32k of memory. (The 32K for program cache is not affected by this
* configuration, and not shown below.) Please find more specifics on how
* the configuration is done further below.
*
*
* Physical internal memory on DM6467 Default partitioning in this .tcf
*
* |//////////| |//////////|
* 0x11818000 +———-+ 0x11818000 +———-+
* | L2Cache | | |
* | and/or | 128k | L2 IRAM | 128k
* | IRAM | | |
* | | | |
* 0x11838000 +———-+ 0x11838000 +———-+
* |//////////| |//////////|
* : : : :
* |//////////| |//////////|
* 0x11F00000 +———-+ 0x11F00000 +———-+
* | | | |
* | L1Cache | | L1DSRAM | 28k
* | and/or | 32k | |
* | L1DSRAM | 0x11F07000 +———-+
* | | | L1Cache | 4k
* 0x11F08000 +- – – – – + 0x11F08000 +- – – – – +
* |//////////| |//////////|
*/
if (platform == "ti.platforms.evmDM6467") {
var device_regs = {
l1DMode: "4k",
l1DHeapSize: 0x7000
};
var params = {
clockRate: 594,
catalogName: "ti.catalog.c6000",
deviceName: "DM6467",
regs: device_regs,
mem: mem_ext
};
}
/*
* Now customize the generic platform with parameters specified above.
*/
utils.loadPlatform("ti.platforms.generic", params);
/* ===========================================================================
* Enable heaps and tasks
* ===========================================================================
*/
bios.enableMemoryHeaps(prog);
bios.enableTskManager(prog);
/* ===========================================================================
* Configure L1 cache and L1DSRAM segment – DM6446
*
* In addition to the 64K at address 0x11800000, the DM6446 device has another
* 48K of physical memory at 0x11F04000 available as internal RAM,
* called the "L1DSRAM" segment in BIOS, and it has another adjacent 32K
* at 0x11F10000 that can either be used entirely for L1 cache,
* or split between L1 cache and more internal memory.
*
* The 80K segment (48K + 32K) starts at 0x11F04000. When powered on, the
* device uses the upper 32K for L1 cache entirely, so BIOS by default defines
* the L1DSRAM segment to be 48K long and does not change the cache.
*
* We can change the default behavior, by shrinking the L1 cache and adding
* the extra space to L1DSRAM. We can set the L1 cache to be 32K (the default)
* or 16K, 8K, 4K, or 0K. The corresponding L1DSRAM sizes then are 48K (the
* default), or 64K, 72K, 76K, or 80K.
*
* The L1DSRAM segment always starts at 0x11F04000.
* ===========================================================================
*/
prog.module("GBL").C64PLUSCONFIGURE = true;
if (platform == "ti.platforms.evmDM6446") {
prog.module("GBL").C64PLUSL1DCFG = "16k"; // changed from default of 32k
}
if (platform == "ti.platforms.evmDM6446") {
/* increase the size of the L1DSRAM by 16K because L1 Cache size has been
* reduced by 16K
*/
bios.L1DSRAM.len += 0x4000;
}
/* ===========================================================================
* Configure L1 cache and L1DSRAM segment – DM6467
*
* Specify 4k for L1D cache, remaining 28k becomes L1DSRAM.
* ===========================================================================
*/
if (platform == "ti.platforms.evmDM6467") {
prog.module("GBL").C64PLUSL1DCFG = "4k"; // changed from default of 32k
}
/* ===========================================================================
* Create heaps in memory segments that are to have heap
* ===========================================================================
*/
bios.DDR2.createHeap = true;
bios.DDR2.heapSize = 0x20000; // 128K
bios.DDRALGHEAP.createHeap = true;
bios.DDRALGHEAP.heapSize = bios.DDRALGHEAP.len;
bios.L1DSRAM.createHeap = true;
bios.L1DSRAM.enableHeapLabel = true;
bios.L1DSRAM["heapLabel"] = prog.extern("L1DHEAP");
if (platform == "ti.platforms.evmDM6446") {
bios.L1DSRAM.heapSize = 0x10000; // all of L1DSRAM's 64K for this heap
}
if (platform == "ti.platforms.evmDM6467") {
bios.L1DSRAM.heapSize = 0x1000; // use 4k of L1DSRAM for heap
}
/* ===========================================================================
* GBL
* ===========================================================================
*/
/* set MAR register to cache external memory 0x80000000-0x8FFFFFFF */
prog.module("GBL").C64PLUSMAR128to159 = 0x0000ffff;
prog.module("GBL").ENABLEALLTRC = false;
prog.module("GBL").PROCID = 0;
/* ===========================================================================
* MEM : startup and SWI stack size
* ===========================================================================
*/
prog.module("MEM").STACKSIZE = 0x1000;
/* ===========================================================================
* Global Settings
* ===========================================================================
*/
prog.module("MEM").ARGSSIZE = 256;
/* ===========================================================================
* Enable MSGQ and POOL Managers
* ===========================================================================
*/
bios.MSGQ.ENABLEMSGQ = true;
bios.POOL.ENABLEPOOL = true;
/* ===========================================================================
* Set all code and data sections to use DDR2
* ===========================================================================
*/
bios.setMemCodeSections (prog, bios.DDR2);
bios.setMemDataNoHeapSections (prog, bios.DDR2);
bios.setMemDataHeapSections (prog, bios.DDR2);
/* ===========================================================================
* MEM : Global
* ===========================================================================
*/
prog.module("MEM").BIOSOBJSEG = bios.DDR2;
prog.module("MEM").MALLOCSEG = bios.DDR2;
/* ===========================================================================
* TSK : Global
* ===========================================================================
*/
prog.module("TSK").STACKSEG = bios.DDR2;
/* ===========================================================================
* Generate configuration files…
* ===========================================================================
*/
if (config.hasReportedError == false) {
prog.gen();
}
/*
* @(#) ti.sdo.ce.examples.servers.all_codecs; 1,0,0,132; 9-9-2008 02:04:16; /db/atree/library/trees/ce-h27x/src/
*/
4、应用程序 cfg
/*
* ======== ceapp.cfg ========
*/
/* use the tracing utility module */
var TraceUtil = xdc.useModule('ti.sdo.ce.utils.trace.TraceUtil');
//TraceUtil.attrs = TraceUtil.SOCRATES_TRACING;
/* set up OSAL */
var osalGlobal = xdc.useModule('ti.sdo.ce.osal.Global');
osalGlobal.runtimeEnv = osalGlobal.DSPLINK_LINUX;
/*
* ======== Engine Configuration ========
*/
var Engine = xdc.useModule('ti.sdo.ce.Engine');
var myEngine = Engine.createFromServer(
"lvengine", // Engine name (as referred to in the C app)
"lvserver.x64P", // path to server exe, relative to its package dir
"ti.sdo.ce.lvproject.server" // server package
);
/* get various codec modules; i.e., implementation of codecs
var lvalg =
xdc.useModule('ti.sdo.ce.lvproject.codec.LVALG');
var myEngine = Engine.create("lvengine",[
{
name : "lvalg",
mod : lvalg,
local: false
}
]);
myEngine.server = "./lvserver.x64P";*/
5、
dsplink 没有重新编译的，
你在百忙中抽空帮我解决问题，不胜感激。。。
chunhua peng：
回复 chunhua peng:
另外你推荐我用哪个版本的sdk 对6467T更适合？
Coolen Xue：
回复 chunhua peng:
1, ceapp.cfg文件中，你仔细检查一下这个部分：
var myEngine = Engine.createFromServer(
"lvengine", // Engine name (as referred to in the C app)
"lvserver.x64P", // path to server exe, relative to its package dir
"ti.sdo.ce.lvproject.server" // server package
);
注意：
第三个参数，是server包的准确名字。你找到你的server目录，里面有一个package.xdc文件，要确保此处第三个参数与package.xdc中定义的包名字一致。
第二个参数是x64p文件在server目录中的准确路径。这是比较容易搞错的地方。
2, 你的SDRAM是256M的吗？ 你运行下cat /proc/cmdline，看看你内核的启动参数中，"mem=size" 给linux分了多少内存？再检查loadmodules.sh中为cmem分配了哪些内存，把linux, cmem占用的内存，与tcf中为dsp分配的内存对照一下，看有没有冲突的地方吧。
3，tcf中你做了哪些修改，我说的新版本的dvsdk链接已经发给你了。
http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_3_10/latest/index_FDS.html
是DVSDK_3_10_00 3_10_00_19
我把新版DVSDK缺省的tcf和tci文件发你，你对比下你的配置。
chunhua peng：
回复 Coolen Xue:
总DDR SDRAM 是 128MB ,
Linux 分配了108M,
内核参数如下：
mem=108M console=ttyS0,115200n8 noinitrd rw ip=192.168.0.230:255.255.255.0:192.168.0.223 root=/dev/nfs nfsroot=192.168.0.223:/opt/nfs
网络测试的参数
x64p 就在server目录下面，名字是匹配的
//////////
loadmodules如下：
#!/bin/sh
# insert cmemk, tell it to occupy physical 120MB-128MB, create
# 20 4K buffers, 10 128K buffers and two 1MB buffers
insmod cmemk.ko phys_start=0x87800000 phys_end=0x88000000 pools=20×4096,10×13107
2,2×1048576
# insert dsplinkk
insmod dsplinkk.ko
# make /dev/dsplink
rm -f /dev/dsplink
mknod /dev/dsplink c `awk "\\$2==\"dsplink\" {print \\$1}" /proc/devices` 0
/////////
我检查了下没有冲突的地方，在开发包内我用同一个 .x64P 放在6467T板子上执行，包内自带的video_copy.out调用它 可以执行成功，但是这个video_copy的源码没有；然后我重新编译了包内的另外一处有源码的video_copy例子生成.out 还是用上面的.x64P,也是出现engine_open 失败的情况，看来是应用程序配置的问题，但是不太好检查，我正准备下载最新DSK看看参考里面的配置和你给的tcf.tar文件能不能执行成功。。。。
Coolen Xue：
回复 chunhua peng:
你确定你用的是128M的DDR吗？
如果，那样的话，你的linux用了0-108M, cmem用了120-128M， 那你tcf里为dsp配的内存全都在128M之后，根本没有内存去放了。
你这种内存分配，是按256M来分配的，如果你实际的内存只有128M的话，问题就在这儿了。
Coolen Xue：
回复 chunhua peng:
我记得1.4版本的dvsdk默认提供了几个不同的server及tcf, 你说的，有的.out可以调用成功，有的不可以，我怀疑是因为它们使用了不同的tcf.
你查看下，可以成功执行的那个包内自带的video_copy.out相对应的cfg文件，找到它的server下的tcf文件。 与你发我的tcf文件做个对比。应该就能定位到问题 了。
