TI中文支持网现在 使用的 APPRO开发板进行测试:
发现使用的ARM CORE的频率为600MHZ 下面是运行时的信息
我修改UBOOT源码 将
static void power_control(void)
{
int arm_freq, ddr_freq, iva_freq, iss_freq, dss_freq;
unsigned char vdd1_val, vdd2_val, vddctrl_val;
/* clk_out = ((OSC_0/ ( N+1 )) * M) / M2 */
arm_freq = ((OSC_0_FREQ / (MODENA_N + 1) * MODENA_M) / MODENA_M2);
ddr_freq = ((OSC_0_FREQ / (DDR_N + 1) * DDR_M) / DDR_M2);
iva_freq = ((IVA_M * OSC_0_FREQ)/(IVA_N+1)/IVA_M2);
iss_freq = ((ISS_M * OSC_0_FREQ)/(ISS_N+1)/ISS_M2);
dss_freq = ((DSS_M * OSC_0_FREQ)/(DSS_N+1)/DSS_M2);
tps65911_init();
vdd1_val = (arm_freq>720)? VDD_1D35:((arm_freq>600)? VDD_1D2:VDD_1D1);
vdd2_val = (iva_freq>306)? VDD_1D35:((iva_freq>266)?VDD_1D2:VDD_1D1);
vddctrl_val = ((iss_freq>400)||(ddr_freq>400))?VDD_1D35:VDD_1D2;
tps65911_config(VDD1_OP_REG , vdd1_val);
tps65911_config(VDD2_OP_REG , vdd2_val);
tps65911_config(VDDCRTL_OP_REG , vddctrl_val);
tps65911_config(BBCH_REG , BBCHEN | BBSEL_3D15V);
}
修改为
static void power_control(void)
{
int arm_freq, ddr_freq, iva_freq, iss_freq, dss_freq;
unsigned char vdd1_val, vdd2_val, vddctrl_val;
/* clk_out = ((OSC_0/ ( N+1 )) * M) / M2 */
arm_freq = ((OSC_0_FREQ / (MODENA_N + 1) * MODENA_M) / MODENA_M2);
ddr_freq = ((OSC_0_FREQ / (DDR_N + 1) * DDR_M) / DDR_M2);
iva_freq = ((IVA_M * OSC_0_FREQ)/(IVA_N+1)/IVA_M2);
iss_freq = ((ISS_M * OSC_0_FREQ)/(ISS_N+1)/ISS_M2);
dss_freq = ((DSS_M * OSC_0_FREQ)/(DSS_N+1)/DSS_M2);
tps65911_init();
vdd1_val = VDD_1D35;
vdd2_val = VDD_1D35;
vddctrl_val = VDD_1D35;
tps65911_config(VDD1_OP_REG , vdd1_val);
tps65911_config(VDD2_OP_REG , vdd2_val);
tps65911_config(VDDCRTL_OP_REG , vddctrl_val);
tps65911_config(BBCH_REG , BBCHEN | BBSEL_3D15V);
}
将电压强制设置为1.35V
启动发现内核的信息如下:
OMAP clockevent source: GPTIMER1 at 20000000 Hz
Console: colour dummy device 80×30
Calibrating delay loop… 599.65 BogoMIPS (lpj=2998272)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
TI81XX: Map 0x84f00000 to 0xfe500000 for dram barrier
TI81XX: Map 0x40300000 to 0xfe600000 for sram barrier
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
regulator: dummy:
NET: Registered protocol family 16
omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!
omap_voltage_add_dev: VDD specified does not exist!
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
omap_mux_init: Add partition: #1: core, flags: 4
Cannot clk_get ck_32
Debugfs: Only enabling/disabling deep sleep and wakeup timer is supported now
registered ti81xx_vpss device
registered ti81xx_vidout device
registered ti81xx on-chip HDMI device
registered ti81xx_fb device
PWM0 init success.
PWM1 init success.
bio: create slab <bio-0> at 0
SCSI subsystem initialized
omap2_mcspi: probe of omap2_mcspi.3 failed with error -2
omap2_mcspi: probe of omap2_mcspi.4 failed with error -2
USBSS revision 4ea2080b
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
omap_i2c omap_i2c.1: bus 1 rev4.0 at 100 kHz
regulator: VRTC: 1800 mV
regulator: VIO: 1500 mV
regulator: VDD1: 600 <–> 1500 mV at 1350 mV
regulator: VDD2: 600 <–> 1500 mV at 1350 mV
regulator: VDDCTRL: 600 <–> 1400 mV at 1350 mV
regulator: LDO1: 1100 <–> 3300 mV at 1800 mV
regulator: LDO2: 1100 <–> 3300 mV at 1800 mV
regulator: LDO3: 1100 <–> 3300 mV at 3300 mV
regulator: LDO4: 1100 <–> 3300 mV at 1800 mV
regulator: LDO5: 1100 <–> 3300 mV at 3300 mV
regulator: LDO6: 1100 <–> 3300 mV at 3300 mV
regulator: LDO7: 1100 <–> 3300 mV at 3300 mV
regulator: LDO8: 1100 <–> 3300 mV at 1800 mV
tps65911-rtc tps65911-rtc: rtc core: registered tps65911-rtc as rtc0
tps65910 1-002d: No interrupt support, no core IRQ
Advanced Linux Sound Architecture Driver Version 1.0.23.
可以看出ARM CORE的频率还是在600MHZ 但是TPS65911的电压已经设置在1.35V运行
现在还不知道如何修改到1000MHZ运行？
我现在使用的版本是APPRO开发板(DM385+MN34041)光盘里面的开发包:
Eason Wang：
有的疑问，你贴的这些代码，应该只是修改了核电压吧，
你把对核频率的判断语句给去掉了，但是不确定你有没有修改那些PLL的参数啊？
Jun Tian1：
回复 Eason Wang:
那我如何去修改哪些参数，能够具体一点吗
kooking：
385平台没有试过，但在368平台做过类似的工作，通过修改ubl PPL配置频率，希望这个对你有帮助：
http://processors.wiki.ti.com/index.php/DM36x_to_DM368_NAND_UBL_porting_guide
Jun Tian1：
回复 Eason Wang:
明白了 ，我还以为DEMO里面已经修改了倍频和分频参数，原来这个还需要自己修改调试。
DM36X芯片的我已经可以做到297MHZ和432MHZ 自由切换。
能不能给定DM385的修改ARM CORE的寄存器的参数设定值？
