8148外接SATA时，如何使用内部时钟来实现

大家好，我用8148外接SATA时，100M差分时钟通过外部时钟芯片提供给SERDES接口，这样SATA是能正常使用的，但是我看8148 DATASHEET，好像也能使用内部时钟，而不需要这个外接的100M差分时钟，我想问一下，具体如何操作呢？

Chris Meng：

你好，

请阅读以下DM814x TRM的21.2.1 Clock Control章节：

The selection for the input clock source for the SERDES, i.e., the 20 MHz reference cock or the 100 MHzdifferential clock, is configured via one of the SATA PLL Configuration register fields (CFGPLL0.SEL_IN_FREQ bit field located @ 0x4814_0720) where 0/1 implies external SERDES differential input/reference 20 MHz clock input source. Note that the SATA PLL configuration registers are accessed fromthe device configuration register space and these registers lie within the control module space which isfound in a different location from where the the SATA peripheral and PHY registers reside.