TI中文支持网各们好，有个问题请教：使用CCS6.2 + 28379D，在CPU2的代码中：
#pragma DATA_SECTION (bufPool,"BufPool")
volatile Uint16 bufPool[4096];
在调度时发现无法修改bufPool的内容，如bufPool[0]=12，结果跟踪时bufPool[0]还是为0；就像只能只读一样。
但我在CCS的编译环境里，可以通过监视内存的方式，直接修改内存的值，所以我认为可能是哪里的设置有问题，
特向大家请教。
CMD文件中的定义如下 ：
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x00007E /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x016000, length = 0x001000
RAMGS1 : origin = 0x017000, length = 0x001000
RAMGS2 : origin = 0x018000, length = 0x001000
RAMGS3 : origin = 0x019000, length = 0x001000
RAMGS4 : origin = 0x01A000, length = 0x006000
RAMGS0 : origin = 0x016000, length = 0x001000
RAMGS1 : origin = 0x017000, length = 0x001000
RAMGS2 : origin = 0x018000, length = 0x001000
RAMGS3 : origin = 0x019000, length = 0x001000
RAMGS4 : origin = 0x01A000, length = 0x006000
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
.text : >>RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
{
codestart : > BEGIN, PAGE = 0
.text : >>RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
.ebss : >>RAMLS5 | RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
BufPool : > RAMGS4, PAGE = 1
.ebss : >>RAMLS5 | RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
BufPool : > RAMGS4, PAGE = 1
snap xie：
回复 Young Hu:
谢谢
各们好，有个问题请教：使用CCS6.2 + 28379D，在CPU2的代码中：
#pragma DATA_SECTION (bufPool,"BufPool")
volatile Uint16 bufPool[4096];
在调度时发现无法修改bufPool的内容，如bufPool[0]=12，结果跟踪时bufPool[0]还是为0；就像只能只读一样。
但我在CCS的编译环境里，可以通过监视内存的方式，直接修改内存的值，所以我认为可能是哪里的设置有问题，
特向大家请教。
CMD文件中的定义如下 ：
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x00007E /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x016000, length = 0x001000
RAMGS1 : origin = 0x017000, length = 0x001000
RAMGS2 : origin = 0x018000, length = 0x001000
RAMGS3 : origin = 0x019000, length = 0x001000
RAMGS4 : origin = 0x01A000, length = 0x006000
RAMGS0 : origin = 0x016000, length = 0x001000
RAMGS1 : origin = 0x017000, length = 0x001000
RAMGS2 : origin = 0x018000, length = 0x001000
RAMGS3 : origin = 0x019000, length = 0x001000
RAMGS4 : origin = 0x01A000, length = 0x006000
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
.text : >>RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
{
codestart : > BEGIN, PAGE = 0
.text : >>RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
.ebss : >>RAMLS5 | RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
BufPool : > RAMGS4, PAGE = 1
.ebss : >>RAMLS5 | RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
BufPool : > RAMGS4, PAGE = 1
snap xie：
回复 Young Hu:
您好，我把地址溢出的问题修正了，但还是发现在CPU2中无法写入RAMGS内存数据。是否RAMGS对CPU2是只读的？或者还有什么设置要改吗？
谢谢
