TI8148 UBoot阶段应该如何配置HDMI？

我想在Uboot阶段使用HDVPSS和HDMI做一个logo显示，使用了git上面的cmd_logo_814x.c的代码，经过修改可以显示出logo。

问题描述：Uboot阶段将HDMI转eDP（NCS8803）信号后，logo不显示；内核启动并加载了ipnc_rdk_fw_m3vpss.xem3程序之后，eDP屏幕可以正常显示图像。

HMDI模块或者HDVPSS模块在Uboot阶段需要怎样配置呢？

Chris Meng：

你好，

你的意思是现在uboot下HDMI已经可以正常输出，但是HDMI转EDP后，屏无法正常显示，对么？

如果是，请问uboot下HDMI输出的分辨率，帧率和内核启动后HDMI输出的分辨率和帧率一样么？

user5305451：

回复 Chris Meng:

是一样的，输出都是1080P 60帧；

配置参数如下：

ti810x_pll_config_hdmi(148500000);ti810x_hdmi_enable(148500000);ti810x_pll_config_dvo2(148500000);pll_write32(PLL_VIDEO2_PINMUX, 0);/*modeline "1920x1080" 148.50 1920 2008 2052 2200 1080 1084 1088 1125 +HSync +VSync *//*modeline "720x480" 27.000 720 736 798 858 480 489 495 525 -hsync -vsync*//*modeline "640x480" 25.20 640 656 752 800 480 490 492 525 -HSync -VSync*//** DVO1(HDMI) **/ti810x_vps_configure_venc(VPS_REG_BASE + 0x6000, 1920, 2008, 2052, 2200, 1080, 1084, 1089, 1125, 0, 0, 0,cmd);/** VENC_A(HDCOMP) **/ti810x_vps_configure_venc(VPS_REG_BASE + 0x8000, 1920, 2008, 2052, 2200, 1080, 1084, 1089, 1125, 0, 0, 0,cmd);/** DVO2 **/ti810x_vps_configure_venc(VPS_REG_BASE + 0xA000, 1920, 2008, 2052, 2200, 1080, 1084, 1089, 1125, 0, 0, 0,cmd);

Chris Meng：

回复 user5305451:

你好，

请对比一下两个1080p的具体的时序配置是否有差异。

user5305451：

回复 Chris Meng:

你好 

我对比确认过了，时序确实是一模一样的。

我想对比一下在代码中有提到的寄存器，但是从sprugz8g这个文档中的寄存器介绍并不全，请问在哪可以看到这些寄存器的介绍呢？

关于标准的选择：BT601和BT709是否有影响呢，现在使用的是BT709，但是我不知道应该如何改成BT601

/*** Enable HDMI output.*/
void ti810x_hdmi_enable(int freq)
{uint32_t temp, temp1;/* wrapper soft reset */temp = hdmi_read32(0x0010) ;temp1 = ((temp & 0xFFFFFFFE)| 0x1 );hdmi_write32(0x0300, temp1);temp = 0;udelay(10);/* configure HDMI PHY *//* 48 Mhz Clock input to HDMI ie SDIO clock output from PRCM */prcm_write32(0x15B0,0x2);// add by wxhdmi_setup_regs();/* Power on the phy from wrapper */hdmi_write32(0x0040, 0x8);while((hdmi_read32(0x0040) & 0x00000003) != 2);hdmi_write32(0x0040, 0x4A);while((hdmi_read32(0x0040) & 0x000000FF ) != 0x5A);hdmi_write32(0x0040, 0x8A);while((hdmi_read32(0x0040) & 0xFF) != 0xAA);/* Dummy read to PHY base to complete the SCP reset process HDMI_PHY_U_BAS */temp = hdmi_read32(0x0300);temp = hdmi_read32(0x0300);if(freq > 50000000)temp1 = ((temp & 0x3FFFFFFF)|(0x1 << 30));//0x40000000);elsetemp1 = ((temp & 0x3FFFFFFF)|(0x0 << 30));//0x40000000);hdmi_write32(0x0300, temp1);temp = hdmi_read32(0x030C) ;temp1 = ((temp & 0x000FFFFF)|0x85400000);hdmi_write32(0x030C, temp1);hdmi_write32(0x0304, 0xF0000000);udelay(10);/* cec clock divider config */temp = hdmi_read32(0x0070) ;temp1 = temp | 0x00000218;hdmi_write32(0x0070, temp1);/* wrapper debounce config */temp = hdmi_read32(0x0044) ;temp1 = temp | 0x00001414;hdmi_write32(0x0044, temp1);/* packing mode config */temp = hdmi_read32(0x0050) ;temp1 = temp | 0x105;hdmi_write32(0x0050, temp1);/* disable audio */hdmi_write32(0x0080, 0x0);/* release HDMI IP CORE reset and release power down of core */hdmi_write32(0x0414, 0x1);hdmi_write32(0x0424, 0x1);/* video actionconfig of hdmi */hdmi_write32(0x0524, 0x0);/* config input data bus width */hdmi_write32(0x0420, 0x7);/* configure AVI INFOFRAME */hdmi_write32(0x0528, 0x0);// VID_MODE CONFIGhdmi_write32(0x04CC, 0x1);// DATA ENABLE CNTRLhdmi_write32(0x0420, 0x37); // ENABLE VSYNC AND HSYNChdmi_write32(0x04F8, 0x0);// iadjust config to enable vsynchdmi_write32(0x0520, 0x10); // csc is bt709// enable change HDMI mode to DVI mode,// both DVI and HDMI monitor can works under DVI modehdmi_write32(0x09BC, 0x20); // enable hdmihdmi_write32(0x0608, 0x20); // tmds_ctrlhdmi_write32(0x0904, 0x0);// disable n/cts of actrlhdmi_write32(0x0950, 0x0);// disable audiohdmi_write32(0x0414, 0x0);// keep audiooperation in reset state/* configure AVI INFOFRAME */hdmi_write32(0x0A00, 0x82);hdmi_write32(0x0A04, 0x2);hdmi_write32(0x0A08, 0xD);hdmi_write32(0x0A10, 0x1);hdmi_write32(0x0A14, 0xA0);hdmi_write32(0x0A1C, 0x8F);hdmi_write32(0x0538 , 0x3);// DISABLE DEEP COLOR MODE IN DC PACKEThdmi_write32(0x09C0 , 0x10);hdmi_write32(0x09F8 , 0x3);// ENABLE AND REPEAT AVI INFOFRAM TRANSMISSONhdmi_write32(0x09FC , 0xF);// ENABLE AND REPEAT GENEERAL PACKET TRANSMISSION
}

Chris Meng：

回复 user5305451:

你好，

请到\DVRRDK_04.01.00.02\ti_tools\device_collateral下找一下相关文档，对比一下寄存器。

user5305451：

回复 Chris Meng:

我用的是IPNC_RDK，在里面没有找到个更全面的文档。最详细的也就是sprugz8g这个文档了，3910页的，寄存器介绍了很多，但是和代码里面使用的寄存器有很多对应不上