TI中文支持网am5728的A15核MMU 使能和关闭在哪配置，在手册上只能找到其他核的MMU寄存器。
以下是手册的内容，明显第二点有A15核的MMU，但在手册上却没找到
This device includes the following MMUs:
• Two top-level (system) MMUs:
– MMU1 dedicated to EDMA Transfer Controller 0 (TC0), and EDMA Transfer Controller 1 (TC1)
– MMU2 dedicated to PCIe_SS1, and PCIeSS2
• One MMU inside the MPU (dual Cortex®-A15) subsystem – MPU_MMU. This MMU is integrated in the
Cortex-A15 processor.
• Two MMUs inside each of the DSP1, and DSP2 subsystems:
– DSP1 subsystem: DSP1_MMU0, and DSP1_MMU1
– DSP2 subsystem: DSP2_MMU0, and DSP2_MMU1
• Two MMUs inside each of the EVE1, EVE2, EVE3, and EVE4 subsystems:
– EVE1 subsystem: EVE1_MMU0, and EVE1_MMU1
– EVE2 subsystem: EVE2_MMU0, and EVE2_MMU1
– EVE3 subsystem: EVE3_MMU0, and EVE3_MMU1
– EVE4 subsystem: EVE4_MMU0, and EVE4_MMU1
• Two MMUs inside each of the IPU1, and IPU2 subsystems:
– L1 unicache MMU – IPU1_UNICACHE_MMU, and IPU2_UNICACHE_MMU
– L2 MMU – IPU1_MMU, and IPU2_MMU
• One MMU inside the 3D GPU (dual SGX544 core) subsystem
• One MMU inside the BB2D subsystem
Nancy Wang：
TI没有提供，您要去arm网站上去找A15的技术参考手册。
infocenter.arm.com/…/index.jsp
