DSP与FPGA通过EMIF进行通信,轮询方式读数,DMA方式向FPGA写数,在用仿真器调试时,时序是正确的,有读有写,但是将程序固化后,再看时序,没有DMA方式通过EMIF向FPGA写的时序了,不知道是什么影响了程序,请大神指教。
Tony Tang:
芯片boot后,bootloader把时钟关掉了。在自已的初始化函数里重新使能一下就好了。
3.3.1.2 Peripheral Clock StateThe clock and reset state of each of peripheral is controlled through a set of system registers. Theperipheral clock gating control registers (PCGCR1 and PCGCR2) are used to enable and disableperipheral clocks. The peripheral software reset counter register (PSRCR) and the peripheral reset controlregister (PRCR) are used to assert and de-assert peripheral reset signals.At hardware reset, all of the peripheral clocks are off to conserve power. After hardware reset, the DSPboots via the bootloader code in ROM. During the boot process, the bootloader queries each peripheral todetermine if it can boot from that peripheral. In other words, it reads each peripheral looking for a validboot image file. At that time, the individual peripheral clocks will be enabled for the query and thendisabled again when the bootloader is finished with the peripheral. By the time the bootloader releasescontrol to the user code, all peripheral clocks will be off and all domains in the ICR, except the CPUdomain, will be idled.
QIN YANG2:
回复 Tony Tang:
谢谢您的回复,但是通过轮询方式进行EMIF读的时序还在,这是什么问题呢
QIN YANG2:
回复 Tony Tang:
已经在每次DMA传输之前添加了使能时钟的语句,但还是没有DMA通过EMIF传输的时序,但是每次的轮询通过EMIF从FPGA读数的时序都是有的,请问这是怎么回事儿呢,请您指教下。
Shine:
回复 QIN YANG2:
应该就是Tony工程师提到的问题,请看一下是否按照下面的写法使能MPORT的。http://processors.wiki.ti.com/index.php/C5515_Boot-Image_Programmer#Ports_idled_by_bootloader
Tony Tang:
回复 QIN YANG2:
QIN YANG2已经在每次DMA传输之前添加�使能时钟的语句,
不明白这是什么意思。
另外:不加gel文件,在boot后库上仿真器,打开原始工程,load symbol跟踪一下程序状态。