TI中文支持网自己做的板子，仿真器使用YXDSP-XDS100V3
经过Test Connection,连接成功。
下面是测试结果：
[Start]
Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
—–[Print the board config pathname(s)]————————————
C:\Users\ADMINI~1\AppData\Local\.TI\116418268\
0\0\BrdDat\testBoard.dat
—–[Print the reset-command software log-file]—————————–
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusbv3.dll'.
The library build date was 'Sep 4 2015'.
The library build time was '21:59:23'.
The library package version is '6.0.14.5'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
—–[Print the reset-command hardware log-file]—————————–
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
—–[The log-file for the JTAG TCLK output generated from the PLL]———-
Test Size Coord MHz Flag Result Description
~~~~ ~~~~ ~~~~~~~ ~~~~~~~~ ~~~~ ~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~
1 64 – 01 00 500.0kHz O good value measure path length
2 64 + 01 20 3.000MHz [O] good value apply explicit tclk
There is no hardware for measuring the JTAG TCLK frequency.
In the scan-path tests:
The test length was 2048 bits.
The JTAG IR length was 38 bits.
The JTAG DR length was 1 bits.
The IR/DR scan-path tests used 2 frequencies.
The IR/DR scan-path tests used 500.0kHz as the initial frequency.
The IR/DR scan-path tests used 3.000MHz as the highest frequency.
The IR/DR scan-path tests used 3.000MHz as the final frequency.
—–[Measure the source and frequency of the final JTAG TCLKR input]——–
There is no hardware for measuring the JTAG TCLK frequency.
—–[Perform the standard path-length test on the JTAG IR and DR]———–
This path-length test uses blocks of 64 32-bit words.
The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 38 bits.
The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.
—–[Perform the Integrity scan-test on the JTAG IR]————————
This test will use blocks of 64 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG IR Integrity scan-test has succeeded.
—–[Perform the Integrity scan-test on the JTAG DR]————————
This test will use blocks of 64 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG DR Integrity scan-test has succeeded.
[End]
但是，调试连接时，报错了：
C55xx: Trouble Writing Memory Block at 0x2e3ce on Page 0 of Length 0x214c: (Error -1146 @ 0x2E3CC) Device ID is not recognized or is not supported by driver. Confirm device and debug probe configuration is correct, or update device driver. (Emulation package 6.0.14.5)C55xx: GEL: File: C:\Users\Administrator\workspace_v5_5\shaantong\Debug\shaantong.out: Load failed.
不知道什么原因？求指导
用过SEED-XDS560PLUS仿真器连接过，但是可能该仿真器驱动不兼容的缘故，连接时时好时坏，还容易蓝屏。所以想换成YXDSP-XDS100V3，连接时报错了。
Shine：
请量一下JTAG信号和CLKOUT管脚是否正确？另外，最好确定一下xds100v3能否连接其他的板子？
user5052112：
回复 Shine:
xds100v3用于EVM5517开发板是好的，
使用SEED-XDS560PLUS仿真器能连接自己制的板子，不能说明JTAG信号和CLKOUT管脚是否正确吗？
Tony Tang：
hualong fengC55xx: Trouble Writing Memory Block at 0x2e3ce on Page 0 of Length 0x214c: (Error -1146 @ 0x2E3CC) Device ID is not recognized or is not supported by driver. Confirm device and debug probe configuration is correct, or update device driver. (Emulation package 6.0.14.5) C55xx: GEL: File: C:\Users\Administrator\workspace_v5_5\shaantong\Debug\shaantong.out: Load failed.
从这个信息来看，JTAG应该已经连上芯片了，好像是在JTAG执行gel文件时，访问芯片资源出问题了。
应该是板子有问题，检查一下C5517的输入时钟，以及电源。
user5052112：
回复 Tony Tang:
输入时钟是18.432MHz,这个可以确认。电源问题，只能说使用SEED-XDS560PLUS仿真器连接上的话，能正常工作。
还有，这个板子上，有三块TMS320C5517，其余两块用xds100v3都能正常连接，就第三块无法正常。但是第三块用WintechDitigal和合众达的SEED-XDS560PLUS仿真器都能连接。好怪啊
Tony Tang：
回复 user5052112:
hualong feng输入时钟是18.432MHz,这个可以确认。电源问题，只能说使用SEED-XDS560PLUS仿真器连接上的话，能正常工作。 还有，这个板子上，有三块TMS320C5517，其余两块用xds100v3都能正常连接，就第三块无法正常。但是第三块用WintechDitigal和合众达的SEED-XDS560PLUS仿真器都能连接。好怪啊
除了频率，看时钟电平是否够；
三个DSP共用的供电吗？以及时钟是共用的，还是三片DSP都是单独供电及时钟？
上面所提到的表现，就算是XDS100V3的表现有区别，但是也还是说明这一片C5517的表现有区别，其它板子也是这种现象吗？
