如题,
设置20Khz PWM开关频率,未修改TBPRD的情况下,
测试PWM偶尔会出现PWM开关频率不是20Khz的问题,有时偏大,有时偏小,不是每次都出。
配置TBCLK = SYSCLKOUT/(HSPCLKDIV*CLKDIV),中HSPCLKDIV,CLKDIV = 1;即TBCLK=SYSCLKOUT,是否是这个原因?
PWM配置如下:
void InitEPwm1(void)
{
// 时基寄存器初始化
EPwm1Regs.TBPRD = SysConfig.PWM_Half_Period; // Set timer period=HSPCLK/fs/2=75M/1.6K/2=1875
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set timer Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBCTL.bit.FREE_SOFT = 0x3; //free run
EPwm1Regs.TBCTL.bit.PHSDIR = 0x0; // don't care
EPwm1Regs.TBCTL.bit.CLKDIV = 0x0; // prescaler = 1
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0x0; // prescaler = 1, TBCLK = SYSCLKOUT/(HSPCLKDIV*CLKDIV)=75MHz
EPwm1Regs.TBCTL.bit.SWFSYNC = 0x0;
EPwm1Regs.TBCTL.bit.SYNCOSEL = 0x1; // 00 Sync output From SYNCI||01 Sync output when TBCTR=0
EPwm1Regs.TBCTL.bit.PRDLD = 0x0; // TBPRD reload from shadow
EPwm1Regs.TBCTL.bit.PHSEN = 0x0; // Master module, Disable phase loading
EPwm1Regs.TBCTL.bit.CTRMODE = 0x2; // Count up and down
// 比较寄存器初始化
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0x0;
EPwm1Regs.CMPCTL.bit.LOADAMODE = 0x2; // Reload CMPA/CMPB When TBCTR=0 or TBPRD
// 动作确认寄存器初始化
EPwm1Regs.AQCTLA.all = 0;
// PWMxA and PWMxB interlace 180 degree
EPwm1Regs.AQCTLA.bit.CAU = 0x2; // clear PWMxA on up = CMPA
EPwm1Regs.AQCTLA.bit.CAD = 0x1; // set PWMxA on down = CMPA
EPwm1Regs.AQCTLA.bit.PRD = 0x0; // CNT=Zero or PRD no action
EPwm1Regs.AQCTLA.bit.ZRO = 0x0;
// 死区寄存器初始化(DSP内部死区为低)
EPwm1Regs.DBCTL.bit.IN_MODE = 0x0; // IN_mode selection
EPwm1Regs.DBCTL.bit.POLSEL = 0x2; // Active high complementary
EPwm1Regs.DBRED = DeadBand_1P5us; //DeadBand_1us; //dead timered:3us
EPwm1Regs.DBFED = DeadBand_1P5us; //DeadBand_1us; //dead timefed:3us
EPwm1Regs.DBCTL.bit.OUT_MODE = 0x3; // Deadband fully enabled
// SOCA used for sampling to convert ADC at EPWM_ET_ON_ZERO
EPwm1Regs.ETSEL.bit.SOCASEL = EPWM_ET_ON_ZERO;
// Generates SOCA pulse each event to have a 16kHz sampling frequency
EPwm1Regs.ETPS.bit.SOCAPRD = 1;
// Enables event
EPwm1Regs.ETSEL.bit.SOCAEN = 1;
//Clear Event Trigger flag
EPwm1Regs.ETCLR.bit.SOCA = 1;
//Enable TZ2 as one shot trip sources
EPwm1Regs.TZSEL.bit.OSHT2 = 1;
//Low level
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO;
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO;
EPwm1Regs.TZEINT.bit.OST = 0;
EPwm1Regs.TZCLR.bit.INT = 1;
// Force IGBT opened initial
EPwm1Regs.TZFRC.bit.OST = 1;
}