CC1310布板的时候应该注意什么

CC1310布板的时候应该注意什么，有没有官方设计PCB图

Yue TANG：

官方参考设计都可以在www.ti.com找到.
www.ti.com/…/technicaldocuments

Design files (10)
Title Type Size (KB) Date Views
LAUNCHXL CC1310/CC1190 (Rev. A)
ZIP 6337 06 Mar 2018 913
CC1310EM-SKY66115-4051 Rev2_0_x Reference Design Files
ZIP 1111 07 Dec 2016 536
SimpleLink CC1310 4-Layer 7×7 Differential 420-510 v1.2.0 Design Files
ZIP 1142 09 Nov 2016 721
SimpleLink CC1310 IPC 4-Layer 4×4 Differential 779-930 MHz v1.0.1 Design Files
ZIP 990 16 Sep 2016 283
LAUNCHXL-CC1310 Design Files
ZIP 3885 27 Apr 2016 3,865
SimpleLink CC1310 4-Layer 4×4 Differential 779-930 MHz v1.0.0 Design Files
ZIP 962 22 Oct 2015 726
SimpleLink CC1310 4-Layer 5×5 Differential 779-930 MHz v1.0.0 Design Files
ZIP 942 22 Oct 2015 415
CC1310EM-7PA-4751 Reference Design for China
ZIP 923 22 Sep 2015 422
SimpleLink CC1310 4-Layer 7×7 Differential 779-930 MHz v1.0.1 Design Files
ZIP 1039 18 Sep 2015 837
SimpleLink CC1310 2-Layer 7×7 Differential 779-930 MHz v1.3.3 Design Files
ZIP 998 11 Sep 2015 472

Yue TANG：

可借鉴CC26XX的, 两者内部结构都是一样的,只是射频部分有差异

CC26XX 硬件设计checklist processors.wiki.ti.com/…/CC26xx_HW_Checklist CC26xx HW Checklist HW Design checklist for CC26xx For proper operation of the CC26xx and for best RF performance it is paramount to follow the reference designs. There might be several application specific reference designs, but the main reference will always be the CC2650EM designs (applies to CC2640R2F as well). Make sure you are using the latest revision by downloading it from the wiki page. Schematics: Verify that all component values are correct. For the RF components and the DCDC-inductor it is also recommended to use the same part numbers. Verify that the Exposed Ground Pad (EGP) is connected to ground. Check that the crystals are within the required spec. (see CC26xx datasheet and CC26xx Crystals article) Note that CC26xx has an internal load cap array on the 24 MHz crystal pins. The cap array supports load cap values from 0 to 10 pF (default setting is CL = 9 pF) Note that using crystals with lower CL will decrease start-up time and power consumption. The same is true for lower Lm (motional inductance) Are antenna matching components included? Ensure that all IO connections are correct (analog functionality, 8 mA capability and sensor controller connection is limited to certain pins). Do you need to support Over-the-Air Download (OAD) for updating BLE firmware? If so, consider adding provisions for external serial EEPROM (i.e., SPI flash) to your board if your application size is not able to meet the code size limitations for on chip OAD which is dependent on the product and SDK release. Use the CC2640R2F LaunchPad design files as a reference for adding external SPI flash (applies to all CC26xx BLE designs). Layout: Ensure that the substrate height (thickness of the dielectric layer between the layout pattern and the undelying ground plane) corresponds to the reference design being copied. For the CC2650EM-XXX reference designs, which are all 2-layer boards, the value is 0.7 mm or 30 mils. For multilayer boards, you can achieve this by placing the ground plane on the layer that most closely corresponds to this height. Ensure that the layout of the RF components closely follows the reference design. All RF components connected to ground should have multiple ground vias close to their ground pads to minimize ground impedance. There must be an uninterrupted and solid ground plane under all the RF components, stretching from the antenna and all the way back to the ground vias in the EGP. There must not be any traces under the RF path. The balun and/or RF filter must be placed as close to the CC26xx as possible. The antenna matching components should be placed as close to the antenna as possible. Ensure that decoupling capacitors are placed as close to the respective VDD pins as possible. It is also important the the ground return path from the decoupling caps and back to the EGP is as short and direct as possible. The DCDC components (10 uH inductor and 10 uF capacitor) must be placed close to the DCDC_SW pin. Equally important is the ground connection from the DCDC-cap to the CC26xx EGP. This should be as short and direct as possible to avoid ground switching noise.

Yue TANG：

CC26XX 布板考量processors.wiki.ti.com/…/CC26xx_HW_training_Layout_Considerations.pdfCC26xx HW Training Layout ConsiderationsFollow the reference layout! • All reference designs are for 2-layer PCBs– Thickness = 0.8 mm– 4 (or more) layers is also ok• Place the RF match close to the RF pins• Solid ground plane– No signal traces underneath the RF path!– Ground return paths between the antenna / RFcomponentsand CC26xx must be uninterrupted– Keep as much signal- and power routing on the toplayer as possible• Place decoupling caps as close to the VDD pinsas possible– Ground return paths between decoupling caps andCC26xx should be short and direct• DC/DC-regulator must have a short and directground connection to CC26xxReference Layout – Differential output• Antenna match components• Longer RF traces must have 50 ohm impedance• Notice orientation of pi-filter layout– Shunt components oriented opposite way to avoidcrosstalkAntenna match components• Longer RF traces must have 50 ohm impedance• Notice orientation of pi-filter layout– Shunt components oriented opposite way to avoidcrosstalk• No traces underneath the RF path– Will increase the impedance of the RF ground returnpaths and, even worse, create current loops– May lead to reduced RF performance and spuriuosemissionMake sure decoupling ground pathsare short and direct (low impedance)• Make sure the DCDC switch groundpath is short and direct (lowimpedance)• Try to locate as much routing aspossible on the top layer in 2-layerPCBsReference Layout – Trace impedance• For RF traces longer than a certain length the impedance should be controlled• TXLine is a free tool for PCB trace impedance calculations– www.awrcorp.com/…/tx-line-transmission-line-calculator

Yue TANG：

AN098 – Layout Review Techniques for Low Power RF Designs (Rev. A)
www.ti.com/…/getliterature.tsp

The checklist below provides important RF PCB design considerations to be followed, and it
is highly recommended that the designers verify their designs with the suggested points
below. Following these points in the checklist will help to achieve optimum performance from
the designs.
1 Ensure that you follow the datasheet layout recommendation unique to the part
(CCXXXX).
2 0603(mils) discrete parts are not recommended because of size and parasitic
values.
3 Verify that bypassing capacitors are as close as possible to the power supply pins
that they are meant to bypass.
4 Ensure each decoupling capacitor only decouples the specific pins recommended
on the reference design and that the capacitor is correct value and type.
5 Ensure that decoupling is done pin<>capacitor<>via.
6 Verify the stack-up matches the reference design. If the design is a 4-layer PCB;
verify that ground plane is layer two right below top/component side.
7 Changing the layer spacing/stack-up will affect the matching in the RF signal path
and should be carefully accounted for as explained in AN068 [2].
8 Verify that the ground plane matches the reference design. There should be a
solid ground plane below the device and the RF path. There should be no ground
plane below the antenna unless you are using an antenna whose manufacturer
recommends a ground plane (for example, a whip antenna).
9 Verify that RF signal path matches the reference design as closely as possible.
Components should be arranged in a very similar way and oriented the same way
as the reference design.
10 The crystal oscillator should be as close as possible to the oscillator pins of the
part. Long lines to the oscillator should be avoided if possible.
11 Verify that the top ground pours are stitched to the ground plane layer and bottom
layer with many vias around the RF signal path. Compare to the reference design.
Vias on the rest of the board should be no more than λ/10 apart.
12 If the part has a differential output, ensure that the traces in the differential section
are symmetrical as in the reference design.
13 If the design uses a battery (such as a coin cell), the battery will act as a ground
plane and should therefore not be placed under the antenna.
14 If the reference design specifies using T-Lines (Transmission Lines), it is very
critical to ensure that the T-Lines match the reference design exactly.
15 Verify that the under-the-device power pad layout is correct. The solder pads and
mask should match and the opening size should ensure correct amount of paste.
Vias should be the correct number and masked/tented to ensure that they don’t
suck up all the solder, leaving none to solder the chip to pad. (Refer to the
datasheet for layout recommendation for the corresponding part.)
16 The board should specify impedance controlled traces. That is, the layer spacing
and FR4 permittivity should be controlled and known.

Important considerations for Antennas:
17 If using an antenna from a TI reference design, be sure to copy the design exactly
and check if the stack-up in the reference design matches your stack-up.
18 Changes to feed line length of antenna will change input impedance match.
19 Any metal in close proximity, plastic enclosure, and human body will change the
antenna’s input impedance and resonance frequency, which must be considered in
the design.
20 For multiple antenna on same board, use antenna polarization and directivity to
isolate.
21 For chip antennas verify that the spacing from and orientation with respect to the
ground plane is correct as specified in antenna’s datasheet.
22 It is a good practice to add a pi-network after the balun filter network for antenna
impedance matching. Component values can be calculated after the PCB is
fabricated and impedance measurement looking into antenna and the balun
network as made at the desired frequency. If not required, the shunt components
can be left un-mounted and a 0 ohm resistor can be used as series component.

Susan Yang：

关于CC1310的布板问题，TI有一系列专门的视频的。您可以点击以下链接

training.eeworld.com.cn/…/9065