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28377D/S有没有其他办法(除了TI提供的)把程序固化在flash里面然后复制到RAM里面运行。

正在用28377D这颗芯片,发现TI提供的把程序放在FLASH里面的办法太啰嗦了,然后我按照28335进行了改进,CMD文件如下:

MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002

RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800

RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800

RAMGS1_15 : origin = 0x00D000, length = 0x00F000
// RAMGS14 : origin = 0x01A000, length = 0x001000
// RAMGS15 : origin = 0x01B000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE_F : origin = 0x088000, length = 0x010000 /* on-chip Flash */
// FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS1_5 : origin = 0x009000, length = 0x002800
// RAMLS3 : origin = 0x009800, length = 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800
// RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
// RAMGS1 : origin = 0x00D000, length = 0x001000
// RAMGS2 : origin = 0x00E000, length = 0x001000
// RAMGS3 : origin = 0x00F000, length = 0x001000
// RAMGS4 : origin = 0x010000, length = 0x001000
// RAMGS5 : origin = 0x011000, length = 0x001000
// RAMGS6 : origin = 0x012000, length = 0x001000
// RAMGS7 : origin = 0x013000, length = 0x001000
// RAMGS8 : origin = 0x014000, length = 0x001000
// RAMGS9 : origin = 0x015000, length = 0x001000
// RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x001000
// RAMGS12 : origin = 0x018000, length = 0x002000
// RAMGS13 : origin = 0x019000, length = 0x001000

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}

SECTIONS
{
codestart : > BEGIN PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAMLS1_5 PAGE = 1
.esysmem : > RAMLS1_5 PAGE = 1

ramfuncs : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

.cinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_CinitLoadStart),
LOAD_SIZE(_CinitLoadSize),
LOAD_END(_CinitLoadEnd),
RUN_START(_CinitRunStart),
RUN_SIZE(_CinitRunSize),
RUN_END(_CinitRunEnd),
PAGE = 0, ALIGN(4)

.switch : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_SwitchLoadStart),
LOAD_SIZE(_SwitchLoadSize),
LOAD_END(_SwitchLoadEnd),
RUN_START(_SwitchRunStart),
RUN_SIZE(_SwitchRunSize),
RUN_END(_SwitchRunEnd),
PAGE = 0, ALIGN(4)

/*.const : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_ConstLoadStart),
LOAD_SIZE(_ConstLoadSize),
LOAD_END(_ConstLoadEnd),
RUN_START(_ConstRunStart),
RUN_SIZE(_ConstRunSize),
RUN_END(_ConstRunEnd),
PAGE = 0, ALIGN(4)
*/
.econst : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_EconstLoadStart),
LOAD_SIZE(_EconstLoadSize),
LOAD_END(_EconstLoadEnd),
RUN_START(_EconstRunStart),
RUN_SIZE(_EconstRunSize),
RUN_END(_EconstRunEnd),
PAGE = 0, ALIGN(4)

.pinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_PinitLoadStart),
LOAD_SIZE(_PinitLoadSize),
LOAD_END(_PinitLoadEnd),
RUN_START(_PinitRunStart),
RUN_SIZE(_PinitRunSize),
RUN_END(_PinitRunEnd),
PAGE = 0, ALIGN(4)

/* .text : LOAD = FLASHE_F,
RUN = RAMGS1_15,
LOAD_START(_TextLoadStart),
LOAD_SIZE(_TextLoadSize),
LOAD_END(_TextLoadEnd),
RUN_START(_TextRunStart),
RUN_SIZE(_TextRunSize),
RUN_END(_TextRunEnd),
PAGE = 0, ALIGN(4)*/

// .cinit : > RAMLS1 PAGE = 0, ALIGN(4)
// .pinit : > FLASHA, PAGE = 0, ALIGN(4)
.text : >FLASHE_F PAGE = 0, ALIGN(4)

/* Initalized sections go in Flash */
// .econst : >> FLASHG | FLASHH PAGE = 0, ALIGN(4)
// .switch : > FLASHC PAGE = 0, ALIGN(4)

Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS0, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS0, PAGE = 1
/* The following section definitions are required when using the IPC API Drivers */ GROUP : > CPU1TOCPU2RAM, PAGE = 1 {
PUTBUFFER PUTWRITEIDX GETREADIDX }
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
} /* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter2_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter3_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter4_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Difference_RegsFile : >RAMGS0, PAGE = 1, fill=0x0000

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

然后用memcpy把.text  .cinit 等section复制到RAM中,但是我发现不能正常运行,这样做运行出来的程序与放在RAM里面的程序接受的IO数据不一样,真不知道该怎么办了,这颗芯片TI也没有提供完善的驱动和程序,真心难用。

Eric Ma:

TI 在controlSUITE中有提供完善的驱动例程啊,都八个版本了,汗。

C:\ti\controlSUITE\device_support\F2837xD\v190

另外,你把.text段都复制到RAM,谁来执行memcpy的函数呢??只有调用memcpy,才能去调用复制到RAM的函数。其他段类似。

建议你参考例程中的initflash函数,这是标准的copy做法。

ERICZ

正在用28377D这颗芯片,发现TI提供的把程序放在FLASH里面的办法太啰嗦了,然后我按照28335进行了改进,CMD文件如下:

MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002

RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800

RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800

RAMGS1_15 : origin = 0x00D000, length = 0x00F000
// RAMGS14 : origin = 0x01A000, length = 0x001000
// RAMGS15 : origin = 0x01B000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE_F : origin = 0x088000, length = 0x010000 /* on-chip Flash */
// FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS1_5 : origin = 0x009000, length = 0x002800
// RAMLS3 : origin = 0x009800, length = 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800
// RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
// RAMGS1 : origin = 0x00D000, length = 0x001000
// RAMGS2 : origin = 0x00E000, length = 0x001000
// RAMGS3 : origin = 0x00F000, length = 0x001000
// RAMGS4 : origin = 0x010000, length = 0x001000
// RAMGS5 : origin = 0x011000, length = 0x001000
// RAMGS6 : origin = 0x012000, length = 0x001000
// RAMGS7 : origin = 0x013000, length = 0x001000
// RAMGS8 : origin = 0x014000, length = 0x001000
// RAMGS9 : origin = 0x015000, length = 0x001000
// RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x001000
// RAMGS12 : origin = 0x018000, length = 0x002000
// RAMGS13 : origin = 0x019000, length = 0x001000

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}

SECTIONS
{
codestart : > BEGIN PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAMLS1_5 PAGE = 1
.esysmem : > RAMLS1_5 PAGE = 1

ramfuncs : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

.cinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_CinitLoadStart),
LOAD_SIZE(_CinitLoadSize),
LOAD_END(_CinitLoadEnd),
RUN_START(_CinitRunStart),
RUN_SIZE(_CinitRunSize),
RUN_END(_CinitRunEnd),
PAGE = 0, ALIGN(4)

.switch : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_SwitchLoadStart),
LOAD_SIZE(_SwitchLoadSize),
LOAD_END(_SwitchLoadEnd),
RUN_START(_SwitchRunStart),
RUN_SIZE(_SwitchRunSize),
RUN_END(_SwitchRunEnd),
PAGE = 0, ALIGN(4)

/*.const : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_ConstLoadStart),
LOAD_SIZE(_ConstLoadSize),
LOAD_END(_ConstLoadEnd),
RUN_START(_ConstRunStart),
RUN_SIZE(_ConstRunSize),
RUN_END(_ConstRunEnd),
PAGE = 0, ALIGN(4)
*/
.econst : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_EconstLoadStart),
LOAD_SIZE(_EconstLoadSize),
LOAD_END(_EconstLoadEnd),
RUN_START(_EconstRunStart),
RUN_SIZE(_EconstRunSize),
RUN_END(_EconstRunEnd),
PAGE = 0, ALIGN(4)

.pinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_PinitLoadStart),
LOAD_SIZE(_PinitLoadSize),
LOAD_END(_PinitLoadEnd),
RUN_START(_PinitRunStart),
RUN_SIZE(_PinitRunSize),
RUN_END(_PinitRunEnd),
PAGE = 0, ALIGN(4)

/* .text : LOAD = FLASHE_F,
RUN = RAMGS1_15,
LOAD_START(_TextLoadStart),
LOAD_SIZE(_TextLoadSize),
LOAD_END(_TextLoadEnd),
RUN_START(_TextRunStart),
RUN_SIZE(_TextRunSize),
RUN_END(_TextRunEnd),
PAGE = 0, ALIGN(4)*/

// .cinit : > RAMLS1 PAGE = 0, ALIGN(4)
// .pinit : > FLASHA, PAGE = 0, ALIGN(4)
.text : >FLASHE_F PAGE = 0, ALIGN(4)

/* Initalized sections go in Flash */
// .econst : >> FLASHG | FLASHH PAGE = 0, ALIGN(4)
// .switch : > FLASHC PAGE = 0, ALIGN(4)

Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS0, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS0, PAGE = 1
/* The following section definitions are required when using the IPC API Drivers */ GROUP : > CPU1TOCPU2RAM, PAGE = 1 {
PUTBUFFER PUTWRITEIDX GETREADIDX }
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
} /* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter2_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter3_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter4_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Difference_RegsFile : >RAMGS0, PAGE = 1, fill=0x0000

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

然后用memcpy把.text  .cinit 等section复制到RAM中,但是我发现不能正常运行,这样做运行出来的程序与放在RAM里面的程序接受的IO数据不一样,真不知道该怎么办了,这颗芯片TI也没有提供完善的驱动和程序,真心难用。

mangui zhang:

这个最新的代码中都写好了 啊    我记得在系统初始化里面

你只需要在预编译中增加一下宏名称就可以了

正在用28377D这颗芯片,发现TI提供的把程序放在FLASH里面的办法太啰嗦了,然后我按照28335进行了改进,CMD文件如下:

MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002

RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800

RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800

RAMGS1_15 : origin = 0x00D000, length = 0x00F000
// RAMGS14 : origin = 0x01A000, length = 0x001000
// RAMGS15 : origin = 0x01B000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE_F : origin = 0x088000, length = 0x010000 /* on-chip Flash */
// FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS1_5 : origin = 0x009000, length = 0x002800
// RAMLS3 : origin = 0x009800, length = 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800
// RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
// RAMGS1 : origin = 0x00D000, length = 0x001000
// RAMGS2 : origin = 0x00E000, length = 0x001000
// RAMGS3 : origin = 0x00F000, length = 0x001000
// RAMGS4 : origin = 0x010000, length = 0x001000
// RAMGS5 : origin = 0x011000, length = 0x001000
// RAMGS6 : origin = 0x012000, length = 0x001000
// RAMGS7 : origin = 0x013000, length = 0x001000
// RAMGS8 : origin = 0x014000, length = 0x001000
// RAMGS9 : origin = 0x015000, length = 0x001000
// RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x001000
// RAMGS12 : origin = 0x018000, length = 0x002000
// RAMGS13 : origin = 0x019000, length = 0x001000

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}

SECTIONS
{
codestart : > BEGIN PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAMLS1_5 PAGE = 1
.esysmem : > RAMLS1_5 PAGE = 1

ramfuncs : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

.cinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_CinitLoadStart),
LOAD_SIZE(_CinitLoadSize),
LOAD_END(_CinitLoadEnd),
RUN_START(_CinitRunStart),
RUN_SIZE(_CinitRunSize),
RUN_END(_CinitRunEnd),
PAGE = 0, ALIGN(4)

.switch : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_SwitchLoadStart),
LOAD_SIZE(_SwitchLoadSize),
LOAD_END(_SwitchLoadEnd),
RUN_START(_SwitchRunStart),
RUN_SIZE(_SwitchRunSize),
RUN_END(_SwitchRunEnd),
PAGE = 0, ALIGN(4)

/*.const : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_ConstLoadStart),
LOAD_SIZE(_ConstLoadSize),
LOAD_END(_ConstLoadEnd),
RUN_START(_ConstRunStart),
RUN_SIZE(_ConstRunSize),
RUN_END(_ConstRunEnd),
PAGE = 0, ALIGN(4)
*/
.econst : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_EconstLoadStart),
LOAD_SIZE(_EconstLoadSize),
LOAD_END(_EconstLoadEnd),
RUN_START(_EconstRunStart),
RUN_SIZE(_EconstRunSize),
RUN_END(_EconstRunEnd),
PAGE = 0, ALIGN(4)

.pinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_PinitLoadStart),
LOAD_SIZE(_PinitLoadSize),
LOAD_END(_PinitLoadEnd),
RUN_START(_PinitRunStart),
RUN_SIZE(_PinitRunSize),
RUN_END(_PinitRunEnd),
PAGE = 0, ALIGN(4)

/* .text : LOAD = FLASHE_F,
RUN = RAMGS1_15,
LOAD_START(_TextLoadStart),
LOAD_SIZE(_TextLoadSize),
LOAD_END(_TextLoadEnd),
RUN_START(_TextRunStart),
RUN_SIZE(_TextRunSize),
RUN_END(_TextRunEnd),
PAGE = 0, ALIGN(4)*/

// .cinit : > RAMLS1 PAGE = 0, ALIGN(4)
// .pinit : > FLASHA, PAGE = 0, ALIGN(4)
.text : >FLASHE_F PAGE = 0, ALIGN(4)

/* Initalized sections go in Flash */
// .econst : >> FLASHG | FLASHH PAGE = 0, ALIGN(4)
// .switch : > FLASHC PAGE = 0, ALIGN(4)

Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS0, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS0, PAGE = 1
/* The following section definitions are required when using the IPC API Drivers */ GROUP : > CPU1TOCPU2RAM, PAGE = 1 {
PUTBUFFER PUTWRITEIDX GETREADIDX }
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
} /* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter2_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter3_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter4_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Difference_RegsFile : >RAMGS0, PAGE = 1, fill=0x0000

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

然后用memcpy把.text  .cinit 等section复制到RAM中,但是我发现不能正常运行,这样做运行出来的程序与放在RAM里面的程序接受的IO数据不一样,真不知道该怎么办了,这颗芯片TI也没有提供完善的驱动和程序,真心难用。

weimin xue:

回复 Eric Ma:

#ifdef _FLASH // // Copy time critical code and Flash setup code to RAM. This includes the // following functions: InitFlash() // // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart // symbols are created by the linker. Refer to the device .cmd file. // memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

// // Call Flash Initialization to setup flash waitstates. This function must // reside in RAM. // InitFlash_Bank0();#endif

所以说调用InitSysCtrl()的时候28377s已经默认把烧写在Flash中的程序调用到RAM空间里运行了?设这样么?

多谢指教!

正在用28377D这颗芯片,发现TI提供的把程序放在FLASH里面的办法太啰嗦了,然后我按照28335进行了改进,CMD文件如下:

MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002

RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800

RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800

RAMGS1_15 : origin = 0x00D000, length = 0x00F000
// RAMGS14 : origin = 0x01A000, length = 0x001000
// RAMGS15 : origin = 0x01B000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE_F : origin = 0x088000, length = 0x010000 /* on-chip Flash */
// FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS1_5 : origin = 0x009000, length = 0x002800
// RAMLS3 : origin = 0x009800, length = 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800
// RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
// RAMGS1 : origin = 0x00D000, length = 0x001000
// RAMGS2 : origin = 0x00E000, length = 0x001000
// RAMGS3 : origin = 0x00F000, length = 0x001000
// RAMGS4 : origin = 0x010000, length = 0x001000
// RAMGS5 : origin = 0x011000, length = 0x001000
// RAMGS6 : origin = 0x012000, length = 0x001000
// RAMGS7 : origin = 0x013000, length = 0x001000
// RAMGS8 : origin = 0x014000, length = 0x001000
// RAMGS9 : origin = 0x015000, length = 0x001000
// RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x001000
// RAMGS12 : origin = 0x018000, length = 0x002000
// RAMGS13 : origin = 0x019000, length = 0x001000

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}

SECTIONS
{
codestart : > BEGIN PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAMLS1_5 PAGE = 1
.esysmem : > RAMLS1_5 PAGE = 1

ramfuncs : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

.cinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_CinitLoadStart),
LOAD_SIZE(_CinitLoadSize),
LOAD_END(_CinitLoadEnd),
RUN_START(_CinitRunStart),
RUN_SIZE(_CinitRunSize),
RUN_END(_CinitRunEnd),
PAGE = 0, ALIGN(4)

.switch : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_SwitchLoadStart),
LOAD_SIZE(_SwitchLoadSize),
LOAD_END(_SwitchLoadEnd),
RUN_START(_SwitchRunStart),
RUN_SIZE(_SwitchRunSize),
RUN_END(_SwitchRunEnd),
PAGE = 0, ALIGN(4)

/*.const : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_ConstLoadStart),
LOAD_SIZE(_ConstLoadSize),
LOAD_END(_ConstLoadEnd),
RUN_START(_ConstRunStart),
RUN_SIZE(_ConstRunSize),
RUN_END(_ConstRunEnd),
PAGE = 0, ALIGN(4)
*/
.econst : LOAD = FLASHA,
RUN = RAMLS1,
LOAD_START(_EconstLoadStart),
LOAD_SIZE(_EconstLoadSize),
LOAD_END(_EconstLoadEnd),
RUN_START(_EconstRunStart),
RUN_SIZE(_EconstRunSize),
RUN_END(_EconstRunEnd),
PAGE = 0, ALIGN(4)

.pinit : LOAD = FLASHA,
RUN = RAMLS0,
LOAD_START(_PinitLoadStart),
LOAD_SIZE(_PinitLoadSize),
LOAD_END(_PinitLoadEnd),
RUN_START(_PinitRunStart),
RUN_SIZE(_PinitRunSize),
RUN_END(_PinitRunEnd),
PAGE = 0, ALIGN(4)

/* .text : LOAD = FLASHE_F,
RUN = RAMGS1_15,
LOAD_START(_TextLoadStart),
LOAD_SIZE(_TextLoadSize),
LOAD_END(_TextLoadEnd),
RUN_START(_TextRunStart),
RUN_SIZE(_TextRunSize),
RUN_END(_TextRunEnd),
PAGE = 0, ALIGN(4)*/

// .cinit : > RAMLS1 PAGE = 0, ALIGN(4)
// .pinit : > FLASHA, PAGE = 0, ALIGN(4)
.text : >FLASHE_F PAGE = 0, ALIGN(4)

/* Initalized sections go in Flash */
// .econst : >> FLASHG | FLASHH PAGE = 0, ALIGN(4)
// .switch : > FLASHC PAGE = 0, ALIGN(4)

Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS0, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS0, PAGE = 1
/* The following section definitions are required when using the IPC API Drivers */ GROUP : > CPU1TOCPU2RAM, PAGE = 1 {
PUTBUFFER PUTWRITEIDX GETREADIDX }
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
} /* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter2_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter3_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Filter4_RegsFile : > RAMGS0, PAGE = 1, fill=0x0000
Difference_RegsFile : >RAMGS0, PAGE = 1, fill=0x0000

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

然后用memcpy把.text  .cinit 等section复制到RAM中,但是我发现不能正常运行,这样做运行出来的程序与放在RAM里面的程序接受的IO数据不一样,真不知道该怎么办了,这颗芯片TI也没有提供完善的驱动和程序,真心难用。

Jinpeng Yuan:

回复 Eric Ma:

请教两个问题:

1.在使用C2prog工具进行串口升级(手册中的SCI-A接口)时,其他的引脚,比如GPIO是不是有个默认的状态?是拉高,拉低还是高阻态?或者是保持之前运行时的状态;

2.使用C2prog工具进行串口升级,支不支持RS485?按照以前用其他芯片的经验是可以的,但是做实验的时候拿示波器抓包,发现上下行的数据是交叉的,根据实验现象判断是不能用485的。

盼回复,谢谢

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