TI中文支持网将mcbsp配置成spi的从机，代码如下，现在收到的数据是错误的，和stm32进行通信，希望专家看下问题：
InitMcbspbGpio();
McbspaRegs.SPCR2.all=0x0000; // Reset FS generator, sample rate generator & transmitter
McbspaRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word, Digital loopback dis.
McbspaRegs.PCR.all=0x0008; //(CLKXM=CLKRM=FSXM=FSRM= 1, FSXP = 1)
McbspaRegs.SPCR1.bit.DLB = 0;
McbspaRegs.SPCR1.bit.CLKSTP = 2; // Together with CLKXP/CLKRP determines clocking scheme
McbspaRegs.PCR.bit.CLKXP = 0; // CPOL = 0, CPHA = 0 rising edge no delay
McbspaRegs.PCR.bit.CLKRP = 0;
McbspaRegs.RCR2.bit.RDATDLY=0; // FSX setup time 1 in master mode. 0 for slave mode (Receive)
McbspaRegs.XCR2.bit.XDATDLY=0; // FSX setup time 1 in master mode. 0 for slave mode (Transmit)
McbspaRegs.XCR2.bit.XPHASE=0;
McbspaRegs.RCR2.bit.RPHASE=0;
McbspaRegs.RCR1.bit.RWDLEN1=2; // 16-bit word
McbspaRegs.XCR1.bit.XWDLEN1=2; // 16-bit word
McbspaRegs.SRGR2.all=0x2000; // CLKSM=1, FPER = 1 CLKG periods
McbspaRegs.SRGR1.all= 0x0001; // Frame Width = 1 CLKG period, CLKGDV=16
McbspaRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
delay_loop(); // Wait at least 2 SRG clock cycles
McbspaRegs.SPCR2.bit.XRST=1; // Release TX from Reset
McbspaRegs.SPCR1.bit.RRST=1; // Release RX from Reset
McbspaRegs.SPCR2.bit.FRST=1;
采用轮询的方式进行判断接收数据，但是现在可以接到，接到的东西乱七八糟，是什么原因
Seven Han：
量一下时序，先看主机发过来的对不对。
