代码如下,现在出现了一个问题,当同时采用EPWM4和EPWM1中断时,只能进入EPWM1中断;如果单独采用其中一个中断,都能进去。请哪位大神指教下。万分感谢。
EALLOW;
PieVectTable.EPWM4_INT = &EPWM4_INT_ISR; // Map CNTL Interrupt
PieCtrlRegs.PIEIER3.bit.INTx4 = 1; // PIE level enable, Grp3 / Int1, ePWM4
EPwm4Regs.CMPB = 50; // ISR trigger point
EPwm4Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPB; // INT on CompareB-Up event
EPwm4Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm4Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on every 1st event
PieVectTable.EPWM1_INT = &EPWM1_INT_ISR; // Map PWM Interrupt
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // PIE level enable, Grp3 / Int1, ePWM1
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // INT on Counter-Zero event
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on every 1st event
EDIS;
mangui zhang:
你这在两个同时中断时 是不是同时又把另一个关了啊
应该是或的关系啊
代码如下,现在出现了一个问题,当同时采用EPWM4和EPWM1中断时,只能进入EPWM1中断;如果单独采用其中一个中断,都能进去。请哪位大神指教下。万分感谢。
EALLOW;
PieVectTable.EPWM4_INT = &EPWM4_INT_ISR; // Map CNTL Interrupt
PieCtrlRegs.PIEIER3.bit.INTx4 = 1; // PIE level enable, Grp3 / Int1, ePWM4
EPwm4Regs.CMPB = 50; // ISR trigger point
EPwm4Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPB; // INT on CompareB-Up event
EPwm4Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm4Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on every 1st event
PieVectTable.EPWM1_INT = &EPWM1_INT_ISR; // Map PWM Interrupt
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // PIE level enable, Grp3 / Int1, ePWM1
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // INT on Counter-Zero event
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on every 1st event
EDIS;
Xinxi Tang:
把两个中断函数最后的标志位清除语句贴出来
代码如下,现在出现了一个问题,当同时采用EPWM4和EPWM1中断时,只能进入EPWM1中断;如果单独采用其中一个中断,都能进去。请哪位大神指教下。万分感谢。
EALLOW;
PieVectTable.EPWM4_INT = &EPWM4_INT_ISR; // Map CNTL Interrupt
PieCtrlRegs.PIEIER3.bit.INTx4 = 1; // PIE level enable, Grp3 / Int1, ePWM4
EPwm4Regs.CMPB = 50; // ISR trigger point
EPwm4Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPB; // INT on CompareB-Up event
EPwm4Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm4Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on every 1st event
PieVectTable.EPWM1_INT = &EPWM1_INT_ISR; // Map PWM Interrupt
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // PIE level enable, Grp3 / Int1, ePWM1
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // INT on Counter-Zero event
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on every 1st event
EDIS;
Linda:
回复 Xinxi Tang:
您好!
请问在两个中断ISR里是如何处理中断标志位的?