TI中文支持网以下是PWM的配置，配置为UPDOWN的时候，可以用示波器观察到波形，配置为UP的时候不能观察到波形
以下是配置为UP的PWM配置
void InitEPwm7Example()
{
EPwm7Regs.TBPRD = 1000; // Set timer period 6000 408
EPwm7Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TB_DIV4 = 0x02
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Setup compare
EPwm7Regs.CMPA.half.CMPA = 500; //3000
// Set actions
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on CAU
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on CAD
EPwm7Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Clear PWM1B on CAU
EPwm7Regs.AQCTLB.bit.CAD = AQ_SET; // Set PWM1B on CAD
// Active Low PWMs – Setup Deadband
// EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
// EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
// EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
// EPwm1Regs.DBRED = EPWM1_MIN_DB;
// EPwm1Regs.DBFED = EPWM1_MIN_DB;
// EPwm1_DB_Direction = DB_UP;
// Interrupt where we will change the Deadband
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA; // Select INT on Zero event
EPwm7Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
// EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
// EPwm1Regs.ETSEL.bit.SOCASEL = 3; // Select SOC from CMPA on upcount
// EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
}
B Z：TI大牛帮忙看一下原因吧？？跪求
以下是PWM的配置，配置为UPDOWN的时候，可以用示波器观察到波形，配置为UP的时候不能观察到波形
以下是配置为UP的PWM配置
void InitEPwm7Example()
{
EPwm7Regs.TBPRD = 1000; // Set timer period 6000 408
EPwm7Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TB_DIV4 = 0x02
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Setup compare
EPwm7Regs.CMPA.half.CMPA = 500; //3000
// Set actions
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on CAU
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on CAD
EPwm7Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Clear PWM1B on CAU
EPwm7Regs.AQCTLB.bit.CAD = AQ_SET; // Set PWM1B on CAD
// Active Low PWMs – Setup Deadband
// EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
// EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
// EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
// EPwm1Regs.DBRED = EPWM1_MIN_DB;
// EPwm1Regs.DBFED = EPWM1_MIN_DB;
// EPwm1_DB_Direction = DB_UP;
// Interrupt where we will change the Deadband
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA; // Select INT on Zero event
EPwm7Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
// EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
// EPwm1Regs.ETSEL.bit.SOCASEL = 3; // Select SOC from CMPA on upcount
// EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
}
B Z：
回复 Igor An:
您好 Igor An
已经按你说的更改了但是还无法观察到波形。
PWM IO初始化
void InitEPwm7Gpio(void)
{EALLOW;
/* Disable internal pull-up for the selected output pinsfor reduced power consumption */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
GpioCtrlRegs.GPAPUD.bit.GPIO30 = 1;// Disable pull-up on GPIO30 (EPWM7A)
//GpioCtrlRegs.GPBPUD.bit.GPIO40 = 1;// Disable pull-up on GPIO40 (EPWM7A)
//GpioCtrlRegs.GPBPUD.bit.GPIO58 = 1;// Disable pull-up on GPIO58 (EPWM7A)
//GpioCtrlRegs.GPBPUD.bit.GPIO41 = 1;// Disable pull-up on GPIO41 (EPWM7B)
//GpioCtrlRegs.GPBPUD.bit.GPIO44 = 1;// Disable pull-up on GPIO44 (EPWM7B)
/* Configure EPWM-7 pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be EPWM7 functional pins.
// Comment out other unwanted lines.
GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 3;// Configure GPIO30 as EPWM7A
//GpioCtrlRegs.GPBMUX1.bit.GPIO40 = 1;// Configure GPIO40 as EPWM7A
//GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 3;// Configure GPIO58 as EPWM7A
//GpioCtrlRegs.GPBMUX1.bit.GPIO41 = 1;// Configure GPIO41 as EPWM7B
//GpioCtrlRegs.GPBMUX1.bit.GPIO44 = 3;// Configure GPIO44 as EPWM7B
EDIS;
}
PWm初始化更改为
void InitEPwm7Example()
{
EPwm7Regs.TBPRD = 1000;// Set timer period6000408EPwm7Regs.TBPHS.half.TBPHS = 0x0000;// Phase is 0EPwm7Regs.TBCTR = 0x0000;// Clear counter
// Setup TBCLKEPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count upEPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE;// Disable phase loadingEPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;// Clock ratio to SYSCLKOUTEPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1;// TB_DIV4 = 0x02EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;// Load registers every ZERO
//EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
//EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Setup compareEPwm7Regs.CMPA.half.CMPA = 500;//3000
// Set actions
//EPwm7Regs.AQCTLA.bit.CAU = AQ_SET;// Set PWM1A on CAUEPwm7Regs.AQCTLA.bit.CAD = AQ_SET;// Clear PWM1A on CADEPwm7Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
//EPwm7Regs.AQCTLB.bit.CAU = AQ_CLEAR;// Clear PWM1B on CAU
//EPwm7Regs.AQCTLB.bit.CAD = AQ_SET;// Set PWM1B on CAD
// Active Low PWMs – Setup Deadband
//EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
//EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
//EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
//EPwm1Regs.DBRED = EPWM1_MIN_DB;
//EPwm1Regs.DBFED = EPWM1_MIN_DB;
//EPwm1_DB_Direction = DB_UP;
// Interrupt where we will change the DeadbandEPwm7Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA;// Select INT on Zero eventEPwm7Regs.ETSEL.bit.INTEN = 1;// Enable INTEPwm7Regs.ETPS.bit.INTPRD = ET_1ST;// Generate INT on 3rd event
//EPwm1Regs.ETSEL.bit.SOCAEN= 1;// Enable SOC on A group
//EPwm1Regs.ETSEL.bit.SOCASEL= 3;// Select SOC from CMPA on upcount
//EPwm1Regs.ETPS.bit.SOCAPRD= 1;// Generate pulse on 1st event
}
还是无法输出波形？这个是啥原因造成的呢？
以下是PWM的配置，配置为UPDOWN的时候，可以用示波器观察到波形，配置为UP的时候不能观察到波形
以下是配置为UP的PWM配置
void InitEPwm7Example()
{
EPwm7Regs.TBPRD = 1000; // Set timer period 6000 408
EPwm7Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TB_DIV4 = 0x02
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Setup compare
EPwm7Regs.CMPA.half.CMPA = 500; //3000
// Set actions
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on CAU
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on CAD
EPwm7Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Clear PWM1B on CAU
EPwm7Regs.AQCTLB.bit.CAD = AQ_SET; // Set PWM1B on CAD
// Active Low PWMs – Setup Deadband
// EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
// EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
// EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
// EPwm1Regs.DBRED = EPWM1_MIN_DB;
// EPwm1Regs.DBFED = EPWM1_MIN_DB;
// EPwm1_DB_Direction = DB_UP;
// Interrupt where we will change the Deadband
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA; // Select INT on Zero event
EPwm7Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
// EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
// EPwm1Regs.ETSEL.bit.SOCASEL = 3; // Select SOC from CMPA on upcount
// EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
}
B Z：
回复 Igor An:
已经解决了，谢谢你的回复
以下是PWM的配置，配置为UPDOWN的时候，可以用示波器观察到波形，配置为UP的时候不能观察到波形
以下是配置为UP的PWM配置
void InitEPwm7Example()
{
EPwm7Regs.TBPRD = 1000; // Set timer period 6000 408
EPwm7Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TB_DIV4 = 0x02
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Setup compare
EPwm7Regs.CMPA.half.CMPA = 500; //3000
// Set actions
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on CAU
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on CAD
EPwm7Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Clear PWM1B on CAU
EPwm7Regs.AQCTLB.bit.CAD = AQ_SET; // Set PWM1B on CAD
// Active Low PWMs – Setup Deadband
// EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
// EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
// EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
// EPwm1Regs.DBRED = EPWM1_MIN_DB;
// EPwm1Regs.DBFED = EPWM1_MIN_DB;
// EPwm1_DB_Direction = DB_UP;
// Interrupt where we will change the Deadband
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA; // Select INT on Zero event
EPwm7Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
// EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
// EPwm1Regs.ETSEL.bit.SOCASEL = 3; // Select SOC from CMPA on upcount
// EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
}
B Z：
回复 Igor An:
我想问一下，现在设置的PWM是向上计数的，中断配置如下
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA;// Select INT on Zero eventEPwm7Regs.ETSEL.bit.INTEN = 1;// Enable INTEPwm7Regs.ETPS.bit.INTPRD = ET_1ST;// Generate INT on 3rd event
中断里面有一个IO翻转，但是测得IO频率是PWM频率的一半，这个是什么原因造成的呢？？？
