TI中文支持网各位前輩大家好
小弟目前使用F28069，SVPWM驅動三相馬達
為了要讀取電流會授做閉迴路控制，使用ADC
主程式架構 參考了PM_Sensorless
使用EPWM1當做MAINISR，內容與 PM_Sensorless LEVEL2 相同
而ADC初始化設定 使用 F2806XILEG_VDC_PM.H 的 ADC_MACRO()
但當我ENABLEFLAG =1 時 中斷無法進行 CCS DEBUG 跳到 F2806x_DefaultIsr.c 的 ILLEGAL_ISR(void)
下列為我相關的設定，想請問我 哪裡設定錯誤 或者 遺漏了甚麼
非常感謝
void main(void)
{…….
InitSysCtrl();
InitPieCtrl();
InitPieVectTable();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
…..
ADC_MACRO()
…..
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT = &MainISR;
EDIS; // This is needed to disable write to EALLOW protected registers
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable EPWM1INT generation
EPwm1Regs.ETSEL.bit.INTSEL = 1; // Enable interrupt CNT_zero event
EPwm1Regs.ETPS.bit.INTPRD = 1; // Generate interrupt on the 1st event
EPwm1Regs.ETCLR.bit.INT = 1; // Enable more interrupts //20180517!!
IER |= M_INT3;
:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
….
} //end main
上為主程式
interrupt void MainISR(void)
{
if(EnableFlag == 1)
{
……..
EPwm1Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}//end enableflag =1
}//end main_isr
上為中斷
下為ADC設定
#define ADC_MACRO() \
\
DELAY_US(ADC_usDELAY); \
AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \
asm(" NOP "); \
asm(" NOP "); \
\
EALLOW; \
AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \
\
DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \
\
AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \
AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \
AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \
\
asm(" RPT#100 || NOP"); \
\
AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \
AdcRegs.ADCCTL1.bit.TEMPCONV=0; \
\
DELAY_US(ADC_usDELAY); \
\
/******* CHANNEL SELECT *******/ \
\
\
AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \
\
AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \
AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \
AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;\
\
AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \
AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \
AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \
AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \
\
EDIS; \
\
\
/* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \
EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \
EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \
EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \
EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */
#endif // __F2806XILEG_VDC_H__
#define ADC_MACRO() \ \ DELAY_US(ADC_usDELAY); \ AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \ asm(" NOP "); \ asm(" NOP "); \ \ EALLOW; \ AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \ \ DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \ \ AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \ AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \ AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \ AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \ \ asm(" RPT#100 || NOP"); \ \ AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \ AdcRegs.ADCCTL1.bit.TEMPCONV=0; \ \ DELAY_US(ADC_usDELAY); \ \ /******* CHANNEL SELECT *******/ \ \ \ AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \ AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \ AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \ \ AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \ AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \ AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \ AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;\ \ AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \ AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \ AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \ AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \ \ EDIS; \ \ \ /* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \ EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \ EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \ EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \ EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */
#endif // __F2806XILEG_VDC_H__
Young Hu：把CCS debug mode的窗口截图发一下
各位前輩大家好
小弟目前使用F28069，SVPWM驅動三相馬達
為了要讀取電流會授做閉迴路控制，使用ADC
主程式架構 參考了PM_Sensorless
使用EPWM1當做MAINISR，內容與 PM_Sensorless LEVEL2 相同
而ADC初始化設定 使用 F2806XILEG_VDC_PM.H 的 ADC_MACRO()
但當我ENABLEFLAG =1 時 中斷無法進行 CCS DEBUG 跳到 F2806x_DefaultIsr.c 的 ILLEGAL_ISR(void)
下列為我相關的設定，想請問我 哪裡設定錯誤 或者 遺漏了甚麼
非常感謝
void main(void)
{…….
InitSysCtrl();
InitPieCtrl();
InitPieVectTable();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
…..
ADC_MACRO()
…..
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT = &MainISR;
EDIS; // This is needed to disable write to EALLOW protected registers
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable EPWM1INT generation
EPwm1Regs.ETSEL.bit.INTSEL = 1; // Enable interrupt CNT_zero event
EPwm1Regs.ETPS.bit.INTPRD = 1; // Generate interrupt on the 1st event
EPwm1Regs.ETCLR.bit.INT = 1; // Enable more interrupts //20180517!!
IER |= M_INT3;
:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
….
} //end main
上為主程式
interrupt void MainISR(void)
{
if(EnableFlag == 1)
{
……..
EPwm1Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}//end enableflag =1
}//end main_isr
上為中斷
下為ADC設定
#define ADC_MACRO() \
\
DELAY_US(ADC_usDELAY); \
AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \
asm(" NOP "); \
asm(" NOP "); \
\
EALLOW; \
AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \
\
DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \
\
AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \
AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \
AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \
\
asm(" RPT#100 || NOP"); \
\
AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \
AdcRegs.ADCCTL1.bit.TEMPCONV=0; \
\
DELAY_US(ADC_usDELAY); \
\
/******* CHANNEL SELECT *******/ \
\
\
AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \
\
AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \
AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \
AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;\
\
AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \
AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \
AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \
AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \
\
EDIS; \
\
\
/* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \
EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \
EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \
EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \
EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */
#endif // __F2806XILEG_VDC_H__
#define ADC_MACRO() \ \ DELAY_US(ADC_usDELAY); \ AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \ asm(" NOP "); \ asm(" NOP "); \ \ EALLOW; \ AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \ \ DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \ \ AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \ AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \ AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \ AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \ \ asm(" RPT#100 || NOP"); \ \ AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \ AdcRegs.ADCCTL1.bit.TEMPCONV=0; \ \ DELAY_US(ADC_usDELAY); \ \ /******* CHANNEL SELECT *******/ \ \ \ AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \ AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \ AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \ \ AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \ AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \ AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \ AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;\ \ AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \ AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \ AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \ AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \ \ EDIS; \ \ \ /* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \ EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \ EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \ EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \ EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */
#endif // __F2806XILEG_VDC_H__
Seven Han：您也可以参考下帖子：
e2echina.ti.com/…/12826
各位前輩大家好
小弟目前使用F28069，SVPWM驅動三相馬達
為了要讀取電流會授做閉迴路控制，使用ADC
主程式架構 參考了PM_Sensorless
使用EPWM1當做MAINISR，內容與 PM_Sensorless LEVEL2 相同
而ADC初始化設定 使用 F2806XILEG_VDC_PM.H 的 ADC_MACRO()
但當我ENABLEFLAG =1 時 中斷無法進行 CCS DEBUG 跳到 F2806x_DefaultIsr.c 的 ILLEGAL_ISR(void)
下列為我相關的設定，想請問我 哪裡設定錯誤 或者 遺漏了甚麼
非常感謝
void main(void)
{…….
InitSysCtrl();
InitPieCtrl();
InitPieVectTable();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
…..
ADC_MACRO()
…..
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT = &MainISR;
EDIS; // This is needed to disable write to EALLOW protected registers
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable EPWM1INT generation
EPwm1Regs.ETSEL.bit.INTSEL = 1; // Enable interrupt CNT_zero event
EPwm1Regs.ETPS.bit.INTPRD = 1; // Generate interrupt on the 1st event
EPwm1Regs.ETCLR.bit.INT = 1; // Enable more interrupts //20180517!!
IER |= M_INT3;
:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
….
} //end main
上為主程式
interrupt void MainISR(void)
{
if(EnableFlag == 1)
{
……..
EPwm1Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}//end enableflag =1
}//end main_isr
上為中斷
下為ADC設定
#define ADC_MACRO() \
\
DELAY_US(ADC_usDELAY); \
AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \
asm(" NOP "); \
asm(" NOP "); \
\
EALLOW; \
AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \
\
DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \
\
AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \
AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \
AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \
\
asm(" RPT#100 || NOP"); \
\
AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \
AdcRegs.ADCCTL1.bit.TEMPCONV=0; \
\
DELAY_US(ADC_usDELAY); \
\
/******* CHANNEL SELECT *******/ \
\
\
AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \
\
AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \
AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \
AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;\
\
AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \
AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \
AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \
AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \
\
EDIS; \
\
\
/* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \
EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \
EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \
EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \
EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */
#endif // __F2806XILEG_VDC_H__
#define ADC_MACRO() \ \ DELAY_US(ADC_usDELAY); \ AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \ asm(" NOP "); \ asm(" NOP "); \ \ EALLOW; \ AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \ \ DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \ \ AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \ AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \ AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \ AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \ \ asm(" RPT#100 || NOP"); \ \ AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \ AdcRegs.ADCCTL1.bit.TEMPCONV=0; \ \ DELAY_US(ADC_usDELAY); \ \ /******* CHANNEL SELECT *******/ \ \ \ AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \ AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \ AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \ \ AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \ AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \ AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \ AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC3CTL.bit.ACQPS = 6;\ \ AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \ AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \ AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \ \ AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \ AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \ AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \ \ EDIS; \ \ \ /* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \ EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \ EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \ EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \ EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */
#endif // __F2806XILEG_VDC_H__
shawn Lin：
回复 Seven Han:
你好我的SATCK 已是 RAM，想請問 我晶片是28069MRAM0 RAM1 是否有差異謝謝
