我想用DSP发出可以变频的PWM波,用的计时器中断,并用counter来判断什么时候高频什么时候低频,同时加了标志位,但输出波形在成功变频一小段时间之后就会有一段大概870us的高电平,但标志位一直是对的。中断程序如下:
interrupt void ISRTimer0(void) //定时器中断,每间隔40US,计数一次,counter加一,同时循环中注意对counter清零
{
// Acknowledge this interrupt to receive more interrupts from group 1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; //0x0001赋给12组中断ACKnowledge寄存器,对其全部清除,不接受其他中断
CpuTimer0Regs.TCR.bit.TIF=1; // 定时到了指定时间,标志位置位,清除标志
CpuTimer0Regs.TCR.bit.TRB=1; // 重载Timer0的定时数据
counter++;
if(counter<=6){
if(counter>=4){
EPwm1Regs.TBPRD=SP1;
EPwm1Regs.CMPA.half.CMPA =SP1/2; //占空比50%,不可以直接代数,那样不会成PWM方波
EPwm1Regs.CMPB=SP1/2;
LED1=1; // LED1对应GPIO11口,指示作用,置一高电平
}
else if(counter>1){
EPwm1Regs.TBPRD=SP2;
EPwm1Regs.CMPA.half.CMPA =SP2/2; //占空比0,即无pwm输出
EPwm1Regs.CMPB=SP2/2;
LED1=0;
}
else{
EPwm1Regs.TBPRD=SP1;
EPwm1Regs.CMPA.half.CMPA =SP1/2; //占空比50%??
EPwm1Regs.CMPB=SP1/2;
LED1=1;
}
}
else{
EPwm1Regs.TBPRD=SP2;
EPwm1Regs.CMPA.half.CMPA =SP2/2; //占空比50%??
EPwm1Regs.CMPB=SP2/2;
LED1=0;
}
if(counter>=8){
counter=0;
}
}
user5571364:
自顶一下,计时器中断会影响PWM的输出么?
我想用DSP发出可以变频的PWM波,用的计时器中断,并用counter来判断什么时候高频什么时候低频,同时加了标志位,但输出波形在成功变频一小段时间之后就会有一段大概870us的高电平,但标志位一直是对的。中断程序如下:
interrupt void ISRTimer0(void) //定时器中断,每间隔40US,计数一次,counter加一,同时循环中注意对counter清零
{
// Acknowledge this interrupt to receive more interrupts from group 1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; //0x0001赋给12组中断ACKnowledge寄存器,对其全部清除,不接受其他中断
CpuTimer0Regs.TCR.bit.TIF=1; // 定时到了指定时间,标志位置位,清除标志
CpuTimer0Regs.TCR.bit.TRB=1; // 重载Timer0的定时数据
counter++;
if(counter<=6){
if(counter>=4){
EPwm1Regs.TBPRD=SP1;
EPwm1Regs.CMPA.half.CMPA =SP1/2; //占空比50%,不可以直接代数,那样不会成PWM方波
EPwm1Regs.CMPB=SP1/2;
LED1=1; // LED1对应GPIO11口,指示作用,置一高电平
}
else if(counter>1){
EPwm1Regs.TBPRD=SP2;
EPwm1Regs.CMPA.half.CMPA =SP2/2; //占空比0,即无pwm输出
EPwm1Regs.CMPB=SP2/2;
LED1=0;
}
else{
EPwm1Regs.TBPRD=SP1;
EPwm1Regs.CMPA.half.CMPA =SP1/2; //占空比50%??
EPwm1Regs.CMPB=SP1/2;
LED1=1;
}
}
else{
EPwm1Regs.TBPRD=SP2;
EPwm1Regs.CMPA.half.CMPA =SP2/2; //占空比50%??
EPwm1Regs.CMPB=SP2/2;
LED1=0;
}
if(counter>=8){
counter=0;
}
}
mangui zhang:PWM输出不需要CPU等参与应该不是中断影响的建议看看周期寄存器和比较寄存器
的关系等是否满足